How To Measure Low Impedance With An Affordable VNA And Using Free Tools

[@wb7ond]

Interesting video. thanks for making that available to the general public. I wanted to mention that the SDR VNA software allows plotting of the impedance formula within the program... Again thanks..

[@ats89117]

Great video! When Adinath didn't completely agree with your simplifications, he would go silent, which was also instructive! 😀

[@gsuberland]

Another interesting thing to look at is AVX's interdigitated capacitors (IDCs), which come in multi-pin packages similar to resistor arrays. They are still a single capacitor internally, but by connecting the pairs of terminals in opposite polarity you create opposing current loops that reduce inductance. They do make layout a little trickier in dense areas since you need to be able to fit vias nearby in opposing patterns, but often your BGA/LGA packages have alternating GND/Vxx pads anyway for referencing when they have high power integrity requirements, so direct in-pad connection is often possible there.

[@rishisolapure7585]

Great work 🔥🔥

[@kxo4518]

It would be interesting to see the difference between

[@tianheyun-e7z]

The PCB board of the test fixture is not embedded. How to eliminate the influence of that test board?

[@miroslawkaras7710]

For port isolatio or noise floor you shoul terminate both ports withh 500 ohms termination. When you calibrate you shoul not connect you standards (open, short , load thru adapter), they should be connected direcly to thend of the cable to avoid any phase diffrence.

[@JaniP-k3r]

Why 500ohms? 👀

[@fabioposser2]

Hi Robert, do you have a video teaching how to choose the profile for the IC? Because I have tools like siwave, but I have doubts how to select the desired impedance for the IC and also how to know the output impedance characteristics of a buck converter for example.

[@samihawasli7408]

Very good presentation, but can I ask? Isn't it bad your S-Parameters were outside the smith chart for your passive resistor? Seems concerning since we then used those S-paramtesr to calculate Zdut

[@thomhpl]

Probably due to poor calibration?

[@samihawasli7408]

“Cheap” cal kit + “affordable” VNA, is what it is. For 400+ bucks I want my resistors to look more lossy than my shorts.

[@veni2598]

Great video! Didn't get it: what's the difference between shorted trace and blob of solder?

[@ThePyrosirys]

The picture is small, but I think the trace is just a normal pcb trace, like 20 mils or something. The blob is just a bigger connection, so it's like multiples of the parasitic resistances and inductances in parallel which makes the parasitics smaller.

[@rb8049]

Correctly done. Great!

[@87Spectr]

I'm sure - great again!=)

[@MrThoriam]

Can somebody explain me the equation how he get impedance from insertion loss? Im a little bit confused. Btw great video

[@ricolauersdorf687]

i wanna do this at home.

[@moseschan6363]

why not nanoVNA ? This device seems really slow and has low bandwidth

[@rjordans]

A nanovna can do this too, the noise floor will be a bit higher though. You can work around that by doing some averaging but then it also gets slower. Also, NanoVNAsaver has the calculations shown here built-in and can directly show the impedance graph for the s21 measurement so no need to export and do calculations unless you want to combine several plots in one graph

[@py2bnd-sota411]

​@@rjordansShure, the dynamic range (noise flore) of NanoVNA is about 20dB higher than on SDR VNA - But for this measurements a NanoVNA is just good enough and SDR Saver just calculates the complex values out of the S parameter.

[@wl9052]

same