While writing the tb of halfadder, unexpected error coming at the TB CODE closing of begin statement (end) there is no syntax error. What should be the error?
@sree_r4g_5 ай бұрын
I tried to find still no solution
@vlsiknowledgehub4 ай бұрын
@@sree_r4g_Please do as like same in video I explained..it will not come.
@funnyworld24366 ай бұрын
Will you post more videos on using verilog code it will be really helpful for poor students like me
@vlsiknowledgehub6 ай бұрын
Okay sure...I will post soon
@ANIKETKUMAR-ui2fv11 ай бұрын
mam how i can see the circuit diagram of half adder in modelsim