HWN - Analog Design Interview Question

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[@MagedAlAnsary]

The output voltage at the end of section (2) is VDD*(R+R')/(2R+R'). There is no multiplication at the denominator.

[@StandforAjdetray]

Thanks👍

[@amitvikrampujar5517]

Please add correction to the output voltage at the end of section-2. It should be R+R+R' .

[@sohamlakhote9822]

Thanx for the question. Why did you assume that MOSFET will turn on in the linear region? At the end of 1st region, VOUT= V(Drain)= VDD. The MOSFET will turn on in the Saturation region(VDD>VG(VDD)-VTH(VDD/2)) thus discharging the capacitor linearly and not exponentially!!! After sometime when V(drain) falls below VDD/2 then MOSFET will act as a switch with on resistance R'. After that whatever you said is correct.

[@romyaz1713]

agreed

[@jhankarmalakar7033]

No, if the transistor turns on in saturation, time time constraint will have the R in series with the supply. Once it enters linear region, time constraint will be R||(R + Ron).

[@apurbadebnath1387]

@sohamlakhote9822 Hi Soham, at the end of the 1st region, V(drain) is not equal to Vout; there will be some voltage drop across the R connected to the drain; hence Vds will be lower than Vdd.

[@timlee209]

I think you mislabeled the y-axis If not, your first clarifying question should have been "Can I assume that Vin is high enough to overcome the threshold voltage?" or something like that.

[@HardwareNinja]

Thank you so much for being here! By any chance do you mean the y-axis in black? If so, what we failed to mention is that that waveform corresponds to Vin. The level that Vin goes is 0 --> VDD --> 0

[@timlee209]

@@HardwareNinja That clears it up. It would've been helpful to label the y-axis, but it's not a big deal.

[@AkashG_ti]

If we assume the time constant of the capacitor is small then the will charge and discharge rapidly assuming charging upto Vdd again and discharging upto Vdd/2(appx assuming R' and R are same) and this will continue upto infinity if the waveform Vdd is as given.....

[@HardwareNinja]

Thank you so much for being here! Can you elaborate on what you mean by "this will continue upto infinity"?

[@coolwinder]

You should have not taken the job as a member of this yt channal, but as a contractor, and not compromised on delivery of material to your viewers.

[@HardwareNinja]

Thank you so much for being here! We won't be compromising on quality, but we would also like to challenge our community a bit more. We hope you understand :)

[@coolwinder]

@@HardwareNinja thank you for your content and your mission, i hope it only grows :)

[@ams_designer_18]

Tau = Rx . C Rx = R || (R + R')

[@ams_designer_18]

This one I'm not sure, but isn't I_tau function = Vc / ( R + R' ) Similarly at initial point vc = vdd , so peak of Ic = I_tau peak Vdd / (R+ R`) Great question, thanks

[@HardwareNinja]

Thank you so much for being here!

[@dodtickson3297]

Initially the capacitor is charged and there’s no current through the transistor. The drain voltage should be vdd. If vin is less than vdd+vth then the transistor will turn on in saturation, which is confusing...

[@AkashG_ti]

Yeah obviously the transistor turns on in saturation so that the capacitor is discharged to appx half the voltage because of the voltage divider to satisfy circuit laws.

[@HardwareNinja]

Thank you so much for being here! Why would the transistor be ON if Vin is less than vdd + vth? Zero is less than Vdd + Vth, right? :)

[@biswajit681]

Good to see after long time... please continue..I have some interview questions...how do I send you?

[@HardwareNinja]

Thank you for planning to contribute to the community. Please e-mail us at [e-mail]. Cheers!

[@noslidemais]

[@amitjana8172]

@Hadware Ninja is the time constant of the ckt is R||(R+R').C?

[@jhonnyboyjr]

Proper ninjas on this sites

[@sauravmishra3980]

Thanks ..but we really need hardware schematic design in deep.

[@biswajit681]

The solution does not seems logical enough...

[@HardwareNinja]

Thank you so much for being here! Could you elaborate on this a bit more so we can provide some additional clarity?