Logical Efforts-III

[@naseerzargar5684]

10:53 Sir How , Why did u skip that???

[@anonyomoysuser3454]

f^ is the best stage effort and it remains the same for all stages.since the logical effort of 2 i/p NOR is 5/3, (5/(5/3)) gives the electrical effort which equals 3.since electrical effort=cout/cin and cout =45 in this case and cin=y,y=15. same for x(3 i/p nand,g=5/3) but the only difference is cout=2*y since we have two parallel nor gates which give parallel capacitances so cout/cin=(2*15)/x i hope you understand this

[@naseerzargar5684]

@@anonyomoysuser3454 thanks for your reply ,i will look into this after a while Thanks again

[@RahulKumar-wv4ti]

@@anonyomoysuser3454 Thanks a lot bro..

[@bishwajeetkumar7897]

Here he used this formula -> Delay = N*F^(1/N) + P

[@pranjalsingh1287]

At 9:07 delay = f + p .so f = g*h but u have taken something else

[@shubhamkumarsaurav5212]

due to branching there is a branching effort also.......what u have written is true for a single stage.......for multi stage B also comes into picture

[@extremeworrired1692]

@@shubhamkumarsaurav5212 still it should be GBH + P

[@ayushbachan6113]

@@extremeworrired1692 he has found the minimum achievable delay along path, previous video 23:47