An Introduction to RV32I Interrupts and Traps

An introduction to what IRQs and traps are and how they work on the 6502 and RV32I processors.
Course web site: faculty.cs.niu....
Errata: At 46:06 the first code at 'resume:' should save the address of the new thread's save area into the _current_thread variable!
Music used in this video (Vibe Tracks, Alternate) was downloaded from the KZbin Audio Library: www.youtube.co...
#riscv
#rv32

[@namvu4180]

Lovely lecture as always! I'd absolutely love to have a lecture on riscv vector extension!

[@JohnsBasement]

Thanks! Hopefully I will get back to some Risc-V tinkering at some point.

[@ArthurOgawa-q9z]

I enjoyed the learning experience! So generous of you to put this information out here for us, Prof. Winans. I am curious to know how you regard the Control Data computers, like the CDC6600, in light of the current RISC lore which largely fails to mention them. I hand-wrote the instruction set on a Hollerith punch card so I could decode core dumps; it was small indeed.

[@JohnsBasement]

😂... My time on FDC machines was limited to Fortran. So I don't really have a basis to judge here..

[@kenappleman5444]

You always have such great content, thank you

[@JohnsBasement]

So nice of you to say. Thanks!

[@lesliedellow1533]

So this is supposed to be a lecture about interrupts on RISC-V processors, and we learn all about interrupts on an ancient processor, which is probably no longer made. At least it lets me feel clever, because I already know the generalities.

[@deterdamel7380]

Great content!

[@JohnsBasement]

Thanks! I'm glad to help!

[@ChrisJackson-js8rd]

does my memory fail me or is there an ibm lineprinter somewhere missing its paperfeed lol.....

[@MrNickolay1986]

By the way, when they say in 6502 manual about something that gets stored in the stack, they mean some kind of hardware stack, right? Do such things exist?

[@JohnsBasement]

Not really. The 6502 stack is in memory from 0x0100 to 0x01ff. The stack pointer is an 8-bit register that represents the low 8 bits of the memory addresses that are used for push & pop operations.

[@JohnsBasement]

...actually, it depends on your definition of 'hardware stack'. I assume that if a stack is in the main memory, then the stack itself is not what I'd think of as a hardware stack. On the other hand, the CPU *does* have a dedicated stack register. So some might think of that as representing a 'hardware' stack.

[@MrNickolay1986]

@@JohnsBasement no, it's just I'm so used to thinking about 'stack' in terms of a container that holds items. So when someone says 'stack pointer' or 'stack register' I kinda struggle to understand what does it mean in relation to hardware operations and stuff (like what does it mean "push some value to the stack" processorwise).

[@JohnsBasement]

@@MrNickolay1986 Yeah. This is why I tried to clarify my first reply. Maybe this will help: kzbin.info/www/bejne/mHaUYqN5r7tod9E

[@MrNickolay1986]

@@JohnsBasement OK, thanks!

[@richardamullens]

Ancient history - and I know this because I started on the PDP-8/e. Examples for the RP2040 would be more pertinent.

[@JohnsBasement]

😂... Yeah, maybe next year.