This short video presents how interrupts work. Visit the book website for more information: web.eece.maine.edu/~zhu/book
Пікірлер: 111
@iliassfe6 жыл бұрын
For the last two months I'm trying to understand the logic behind ARM MCUs, so I ran across many tutorials. By far you have the best presentations! Thank you my friend!
@krish2nasa7 жыл бұрын
Excellent Explanation, Thank you very much Prof Yifeng
@caioheitor31817 жыл бұрын
Very good class with several amazing details !!!
@mohangovind7006 жыл бұрын
Excellent Presentation about NVIC i have ever seen...............................
@ningben716111 ай бұрын
Excellent Explanation, Thank you very much Prof Yifeng~~~
@rileystewart91652 жыл бұрын
Although the voice in the video is not perfect, it's surprisingly good for a robot, and considering the content and explaination was excellent, I'm very happy with the final product! Subscribed.
@embeddedsystemswitharmcort90512 жыл бұрын
Glad to know that. I have started to use my own voice now.
@richardqqq1767 жыл бұрын
you make the ARM architecture story sound so clear
@omar-shukrimcintosh90974 ай бұрын
Thank you robot for the clear explanation, using an almost dead, emotionless voice.
@abnass85594 жыл бұрын
Thank you Dr. Zhu
@Ulbert863 жыл бұрын
What a great presentation! Excelent work!
@embeddedsystemswitharmcort90513 жыл бұрын
Thank you. I am glad you like it.
@hubert_c3 жыл бұрын
Very good analogy for polling vs interrupt.
@alevez20042 жыл бұрын
Outstanding video, thank you very much
@nancywangeci81896 жыл бұрын
A very good lesson .... you explain so well ... thanks and GOD bless.
@victorial5141 Жыл бұрын
this channel is underrated
@ShivamGupta-qe1me4 жыл бұрын
Thanks sir for making this video. keep uploading more.
@VitaminVS6 жыл бұрын
These are great videos. Is the book having similar explanation?
@eestop29786 жыл бұрын
can we get the slides please? thank you for the video.
@Caffeine_Addict_20204 жыл бұрын
incredible explanation
@kingfalconkhan4 жыл бұрын
Wahuuuu amazing video Prof. Zhu... Thanks a lot..!
@embeddedsystemswitharmcort90514 жыл бұрын
Most welcome!
@user-ez8le1rp3x3 жыл бұрын
Voice like a melted butter
@embeddedsystemswitharmcort90513 жыл бұрын
Yeah, in the future, I will use my own voice.
@nelsoncastillo45066 жыл бұрын
very good tutorial video!!!
@tomhyhlik17884 жыл бұрын
thank you for such great explanation.
@embeddedsystemswitharmcort90514 жыл бұрын
You are welcome!
@user-qp8jb8or8b2 жыл бұрын
very good tutorial!
@mukundhanamshet9354 жыл бұрын
Awesome video thank you
@vishnuchittapu84597 жыл бұрын
when dma interrupt is performing whether exti3 is in active state or pending state
@paulg.30674 жыл бұрын
What robot software reads that text? It has an amazing natural pronunciation
@axela.92472 жыл бұрын
Great video
@himmelblau19064 жыл бұрын
awesome lecture! thanks!
@embeddedsystemswitharmcort90514 жыл бұрын
You are welcome!
@shiningmickey Жыл бұрын
Thanks for the nice video. In the nested interrupt example, why isn't Pending Register for EXTI3 becomes 1 again when it is stacked and waited for DMA1_Channel2 interrupts to be finished?
@ulysses_grant6 жыл бұрын
Man, I owe you a beer. Really.
@minghanqiu10953 жыл бұрын
Buy his book then
@ulysses_grant3 жыл бұрын
@@minghanqiu1095 I did!
@user-tc4ro5og3h2 жыл бұрын
Does NVIC clear the icpr register by itself? Or is it the responsability of the interrupt handler?
@kaviyathangaraj8242 Жыл бұрын
what is meant by 64 in interrupt calculation (64+4*n)?
@coolwinder4 жыл бұрын
9:10 - Interrupt Vector Table & Example
@suseelkousic678710 ай бұрын
In the interrupt handler function why are we setting the Bit in PR register at last ?
@Wyvernnnn4 жыл бұрын
Ah; $67 without shipping for the book. You should publish an epub version Pr. Shu
@astaghfirullahalzimastaghf36482 жыл бұрын
@16:18 so the process of preserving environment variable(by pushing the aforementioned registers onto the stack) cost the CPU 32-bits of addresses.. while unstacking, does it cost cpu 32-bits of address line too? And also does ISR only do two instructions? (BX and LR).. How much address the CPU need for this?.. So why does we need to offset 64bits of address when we want to determine the address of program ISR? (64+4xn) From what I understand, stacking environment variables cost 32bits of address, which corresponds to 4 bits of address is used to push a value from a register to the stack.. Does this means BX and LX cost the CPU 4 bits of address each? If that the case to find the next address of ISR program would be 32+4+32+4xn. if not then, 32(for stacking)+32(for unstacking)+4(for BX and LX or any other ISR operations that might require only 4bits of address)*n(nth element of an array of ISR)
@battellone6 жыл бұрын
excellent
@OverlordNibble7 жыл бұрын
perfect movie for a rainy day
@paulg.30674 жыл бұрын
yes, with a girlfried in the arms, on the sofa and a cup of potatochips, fine selection of cheese and a bottle Chateau Lafite 1936...
@mannguyen57812 ай бұрын
64 + 4 *n , could you clarify the formula in more details, please? Thanks a million.
@jashielp.estrada71633 жыл бұрын
Wow. Now I understand interrupts for my job interview XD.
@da_druuskee77093 жыл бұрын
did you get the job?
@jashielp.estrada71633 жыл бұрын
@@da_druuskee7709 yes I got it. :)
@kennyecheverry56843 жыл бұрын
i'm reviewing for that right now! Any advice? XD
@ashwin372 Жыл бұрын
are you on LinkedIn. i sent you a request please accept i am From India
@venkatanagateja30725 жыл бұрын
thank u
@VAXHeadroom3 жыл бұрын
There is a key piece of information here which the ARM documentation on the NVIC does NOT answer: Is a higher priority number more or less urgent? Thank you for including the answer in this video!
@embeddedsystemswitharmcort90513 жыл бұрын
Great to know that.
@Molnihun962 жыл бұрын
Lower value means higher priority. Configurable values range from 0 to 15, while non-configurable high-priority interrupts can even have negative values. -3 being the highest priority. You can check these informations in the RM0090 reference manual under "table 61." ("External interrupt/event controller (EXTI)" section).
@emilyhuang27593 жыл бұрын
So what is preemption
@Dads_Crown Жыл бұрын
in intrupt calculation what is mean by 64
@MrKaviraj757 жыл бұрын
Is a robot reading the text?
@superiorphi57785 жыл бұрын
yes, its to eliminate people potentially complaining about Prof Yifeng Zhu's accent
@romandavydov86845 жыл бұрын
Robots everywhere these days....
@BillCipher13374 жыл бұрын
@@superiorphi5778 his accent isnt even that bad ... :/
@tomhyhlik17884 жыл бұрын
better robot than strong accent
@embeddedsystemswitharmcort90513 жыл бұрын
KZbin does not allow voice over an existing video. Do you folks know a good solution?
@rindaman91513 жыл бұрын
Can I Get The PPT?
@debajyotichatterjee58634 жыл бұрын
17:30 -- Is it possible to disable Interrupt nesting in the ARM Cortex-M Microcontrollers? Is it required to be performed in software? Or is there a way to configure the NVIC to be able to block the other IRQs once a IRQ is being serviced?
@jerrysundin84253 жыл бұрын
There is never a reason for this as long as you sort priorities according to needs.
@LubosMedovarsky2 жыл бұрын
Priority vs. subpriority depth is a compromise at cost of subpriority bit depth, and is configurable in most Cortex-Ms.
@syedmuhammadshayan9105 Жыл бұрын
If an interrupt is preempted why its active bit still stays 1
@parthshinde59664 жыл бұрын
13:46 Isn't Stack Last-in-First-out? According to explanation here, it looks like registers are stacked inversely because top of the stack is popped first.
@embeddedsystemswitharmcort90514 жыл бұрын
Cortex-M4 uses full descending stack by default.
@parthshinde59664 жыл бұрын
@@embeddedsystemswitharmcort9051 yes that is true. You are correct. I had lack of conceptual knowledge
@hakuhakuji3 жыл бұрын
15:38 When an interrupt is done, a BX LR instruction is executed? But how does LR register receives the value of PC before the interrupt? Does it happen automatically? Or we need to get it from the stack thst was previously saved?
@embeddedsystemswitharmcort90513 жыл бұрын
The hardware automatically preserves LR value onto the stack, and sets LR to a new value to indicate which stack is used. This happens automatically.
@hakuhakuji3 жыл бұрын
@@embeddedsystemswitharmcort9051 Thank you for the fast answer. I think saying that exceptional return value EXC_RETURN is stored there during the interrupt handling is better. Loading this value by BX will automatically start unstacking and subsequently load the right value to PC. I've done some research on my own :)
@Jarrod_C5 жыл бұрын
wait is there an error at 11:42 because the address of the pointer to the ISR is 30D but the address of the ISR is 30C? What is going on here?
@chimeraSTEM5 жыл бұрын
The slide is correct. The address to jump to must have the least significant bit of the least significant bite set to 1 to indicate the processor is executing in THUMB mode. The video does explain this.
@astaghfirullahalzimastaghf36482 жыл бұрын
@15:41 why he is saying that the program ISR (Interrupt Service Routine) or Interrupt Handler has the size of 32 bytes but demonstrate it in 32 bits? if 1 opcode is one byte(8bits), and 1 data line is 64 bits.. 1 bit of address line can have an instruction(opcode) + data =64 bits 4 bits of address line= 4*64 =256 bits or 1 byte.. 8 bits of address line= 2 bytes if 32 bits of address line= 8 bytes.. oh ok so i understand this ISR program requires 8 bytes of address line.. Or 32 address space
@lingyili64893 жыл бұрын
In explain sram mapping, it states stack going down, heap up. That,s only one stack. When in MSP and PSP, how sram is configured?
@embeddedsystemswitharmcort90513 жыл бұрын
MSP and PSP are configured by software during the booting process, specifically by startup.s.
@DanielBaluta Жыл бұрын
at 1:23 the phone analogy doesn't really work. If you pick up the phone before a call arrives then the sender will get a busy tone.
@embeddedsystemswitharmcort9051 Жыл бұрын
You pick up the phone and hang it up if there is no incoming call.
@creedo83012 жыл бұрын
10:48 why in the address 0x00000064 does it contain the address 0x0800030D and not 0x0800030C ? can anyone help please
@embeddedsystemswitharmcort90512 жыл бұрын
The least significant bit must be 1 to indicate that the processor is to run in Thumb mode. ARM Cortex-M only support Thumb instructions.
@coderhex16753 жыл бұрын
in 17:21 there shuldn't be a pending state. I observed in my program. If you are pointing that this pending bit is flipping 1 to 0 so quickly when we enter ISR12 that we cannot observe this case, again there is no 1 to 0 switch. Could you provide me your proof?
@embeddedsystemswitharmcort90513 жыл бұрын
This is an interesting question. The "Interrupt Set-pending Registers" and "Interrupt Clear-pending Registers" works in pairs to set or clear the pending state of an interrupt. You can find more information in Cortex -M4 Devices Generic User Guide.
@coderhex16753 жыл бұрын
@@embeddedsystemswitharmcort9051 sorry for my bad english but did you completelly understand what i am tying to tell you? If i couldnt, i can tell with other sentence. I appriceate your videos so i respect you a lot. Could you provide me the exact sentence in the document?
@petros42256 жыл бұрын
Sciencephille the AI? what are you doing here?
@haideralam1 Жыл бұрын
Only complain with you is Robo voice, please upload same video in your original voice
@KirstaRunner6 жыл бұрын
Watch the video at 1.5 or 2.0 speed.
@khaledhumood79876 жыл бұрын
i emailed youtube to add 3 and 3.5 speeds
@mahmutbostan60804 жыл бұрын
hi bro What is the maximum interrupt speed for stm32f767zi?
@manhtieu65693 жыл бұрын
Can you explan that why stacking and unstacking take 12 cycle , again tail chain take 6 cycle? Please ...