LMARV-1 reboot part 9: Refactoring, final proof, and a ROM!

Short video this time, just a few refactorings in prep for starting on the actual schematics. The ROM I've chosen to run the sequencer is a Flash ROM with an access time of 70ns, so I think a 10MHz system clock (100ns per cycle) is optimistic. I'll likely use 6MHz so that I have a 1MHz machine cycle.
nMigen exercises: github.com/RobertBaruch/nmige...
github repo for code: github.com/RobertBaruch/riscv...
RISC-V specs: riscv.org/technical/specifica...
nMigen tutorial: github.com/RobertBaruch/nmige...

[@esra_erimez]

I love all the your videos. The shorter form ones are easier to digest. Not pointless at all.

[@LaserFur]

One thing people need to watch out for when using ROM's as logic is that the outputs can have glitches until the inputs are all stable for that delay time. Since you are using a clocked design this should be fine, but I have seen people try to use ROM's in async designs. To understand the problem lets say you have a 3 input, 1 output ROM that you programed as a AND gate. As inputs go high and then low the chip can cycle threw other addresses for a moment. The ROM"S that are inside FPGA's LUT'S are implemented differently to prevent glitches.

[@RobertBaruch]

Yep, +200%. I did realize this just after I posted the video, and found ONE address line that wasn't registered properly. Oops!

[@megabytephreak]

I'd be pretty nervous about using multiple fine pitch connectors like that. I suspect you'll run into tolerance issues getting them all installed on the board aligned correctly to mate up. If the alignment isn't perfect you could have issues mating the boards or intermittent connections due to stresses.

[@LaserFur]

In the past I made a cutout version of a PCB to act as a standard to hold all the matching connectors. in this case it would be a matter of sawing out a square in the center so you can solder the matching connectors with this jig in place.

[@0xTJ]

One thing to be careful about some of those small connectors is that many of them are rated for very few insertion cycles. I've had to deal with some that are pretty fragile, and the development boards need to be reworked once in a while when the connectors stop working well.

[@RobertBaruch]

The ones I'm considering using specify 50 cycles, which I'm hoping will be enough during development.

[@adrianjanik8996]

Hello Robert! I see that the memory chips you want to use are powered from 2,6 - 3,3V, but the 74FCT chips - from 5V. Additional buffers / level shifters will be necessary. Greetings from Germany for you and all the hardcore fans.

[@404Anymouse]

I would expect that with hard connectors like that, with lot of them on the board, you'll not only face issues with tolerances, but even the same force related issues like with pinheaders. One possible fix that I thought of was to have folded flat flex cables between the boards instead of the connectors coupling the boards directly. Not sure, though, maybe it won't be a problem at all. I'm just going by gut feeling based on the fact that whenever i'm opening those connectors, it's by prying from one side. If there's lot of them on single board, you don't get that mechanical advantage because you need to pull orthogonally to the board.

[@merseyviking]

Flatflex might be the way to go, PCBWay does them www.pcbway.com/pcb_prototype/What_is_Flexible_PCB.html and probably others too.

[@RobertBaruch]

This is one thing I worry about: the connectors are only attached to the pads with solder, and the pads are attached to the substrate with glue? epoxy? So if I pull on a board, those connectors take all the force. In any case, I ordered a bunch of these connectors to try them out.

[@404Anymouse]

@@RobertBaruch Well, there will always be same force per connector. The real question is whether those connectors will hold if pulled orthogonally.

[@PierceAndjelkovic]

Definitely not pointless Robert! We're hardcore remember? I get excited when you have an update going up on your channel!

[@truezulu]

Great stuff! I'm looking forward to the proff, and the board assembly. Really crossing my finger that its going to work :) Happy new year!

[@r.d.machinery3749]

Happy New Year, Robert :)

[@movax20h]

If price is not a big concern, Cypress Semiconductor and Everspin Technologies, do have neat fast NVRAM chips. 25ns. But ~20-60$ per 16Mb chip. Other option is to use 10ns SRAM (10$ per 16Mb) and load it on boot using some auxilary microcontroller. I think close to 100MHz is possible. Also using CPLDs for sequencer is another option.They are cheap, very easy to program, often doesn't require complex software tools, and are non-volatile (instant boot), and very low power usage. For example Xylinx XC2C128 has 100 IO pins, and 5.7ns pin-to-pin logic delay. XC2C256 is also an option, with a bit more extra pins, more cells. I think CPLDs are a great fit for a project like this. But, prototyping with Flash ROM is a good start I think.

[@hjups]

I think you sort of jumped from one frying pan into another there... By having 12 HMCs you are going to face tolerance issues (someone else pointed this out as well) and still have the possibility of binding. You should really use a small number of larger HSMCs instead - I wouldn't use more than 4 of them per PCB side. 4 may even be pushing it... And in fact, with more than 1, you probably need to have a solder jig just to align them (a PCB with the mating connector that lets you solder the other side down). The more you add, the more constraints you place - I have seen modules with 4 of them, and most either have 2 or 3. The ones that have 3 are positioned like =| to help loosen the constraints. For modules with 4, they are either as == or |=| Keep in mind that a HSMc with 400 pins or 20 pins will probably be identical in how easy they are to connect / disconnect, since they are self aligning. Though with more pins, you do have to be careful not to break the connector. Also, be careful about standoff height. Since the HSMcs are thin profiled, you want to make sure that your components don't collide with the mating PCB / components - typically modules that use them only load components on the side opposite the connector, and place small passives (like 0402 resistors and capacitors) on the side with the connector. You can potentially increase your standoff further by using an adapter PCB (a rectangle with the center cutout, which has HSMCs on both sides of the PCB). That would allow you to stack them infinitely (well up to the point where the resistance of the connectors becomes too high). For your flash chips, you won't be able to take them out of the circuit and reprogram them, unless you have them on their own PCB with a mating programming board. The packages from the datasheet are TSOP and BGA. They're also 3.3V CMOS which won't work with your 5V logic chips. Putting them on a removable module is probably the best idea, though you should use a connector that has sufficiently high insertion cycles. Perhaps you could use a SODIMM connector (you can get some that fit almost flush to their PCB, and they can have 204 pins for DDR3, or 260 pins for DDR4). If you do that though, make sure to follow the DDR SODIMM mechanical spec, or they could end up damaging the ROM board / the SODIMM connector after a few insertion cycles. For example, the DDR4 spec is 1.2+/-0.1 mm thick, pads 0.25mm from the edge, no edge bevel, and gold fingers on the pads.

[@RobertBaruch]

Some good thoughts there. For the most part, I'll be using 3v3 logic. There are some bits which are only 5v logic for unavoidable reasons, though, but hopefully that will be limited. I may still revisit the whole stacking connector thing.

[@gsuberland]

How about instead of using connectors, you just make the whole thing a card-edge? Then you can "stack" the boards on top of each other, but sideways instead of vertically, on a kind of motherboard backplane. You could even use PCI or PCI-e connectors, since they're designed to handle that kind of mechanical strain. Bonus: if you set up the pitch properly, you could have the edges of the board have the same brackets as PCI(-e) cards and connect to the same mounting slots to keep them rigid and upright. Or maybe even mount the whole thing in an old PC case! EDIT: looking at your design you might have too many pins for PCI-e, but DDR4 sockets should work. They're 288 pins, so if you budget one third of those lines for grounds that leaves you with 222 signals, which fits your six 32-bit buses plus 30 additional signals. The memory modules are supposed to be 1.4mm thick, but you should be able to *just* get away with 1.6mm on some of the sockets with wider tolerances, or go for JLC's 1.2mm option (which is within contact mating tolerance on all the sockets I checked) if you don't need their assembly service. Could be worth buying a couple of different DDR4 sockets (most are under two dollars on digikey) to try out. EDIT2: PCI-e riser sockets are even better for this task. 280 pins (2x140 @ 1mm pitch), 1.6mm board friendly, spec'd for plenty of current and high frequency, cheap enough, available as both SMT and TH parts. They're also long enough that the insertion force would be nicely distributed. Plus you could still use the PCI-e card bracket/cage idea to keep them upright.

[@lawrencemanning]

I'm assuming you will have tooling for the production of the flash data, generated from the sequencer HDL? I assume those flashes will not too negatively limit the speed of the processor?

[@smunaut]

Are those the Samtec QSE/QSH ? Did you look at the price of those ? :)

[@RobertBaruch]

No, they were Hirose. But I'm ditching those and looking at using Panasonic P5K (0.5mm) connectors now.

[@gudenau]

Where in the specs are the interrupts and traps defined? I didn't find that when I looked.

[@RobertBaruch]

It's in Volume 2, Privileged Spec.