LUT-based Sine-wave in VHDL for Power Electronics converters with FPGA

[@mubasheer5584]

Wow nice one. What Major changes should I do in this code to use it for 12 bit parallel interface DAC.

[@HereisAnatolii]

@@mubasheer5584 you can write at the output: sig_12b

[@syliaamarouche3386]

Thank you for this amazing video, it was very helpful, but how about cose-wave ?

[@ElrondMcBong.]

just use cos instead of sin in python

[@qamchi5075]

You can upload the source code

[@gauravmodi1071]

How may I contact you through email because I am interested to develop Signle processing in MCU/MPU and FPGA

[@HereisAnatolii]

@@gauravmodi1071 you can find me on LinkedIn

[@gauravmodi1071]

@@HereisAnatolii Thank you sir