Modulo Counter Using Asynchronous Counter: Basics, Circuit, Designing, Working, and Waveforms

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[@ektachhaila6958]

The explanation is just amazing. It is maintaining my curiosity that's the best part. Thankyou Professor :)

[@EngineeringFunda]

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[@CNILOYBARUA]

Great video sir ,LOVE from Bangladesh

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[@udaychauhan395]

Thank you sir, lots of love from IIT Guwahati 👏🥰

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[@nirmalchoudhary3196]

Nice teaching skill 😄

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[@deadpool4098]

At 8:16 - 8:17 I think there should be AND gate instead of NAND gate because In the video of preset and clear you taught that clear works when clear = 0. Since it is already active low, a high signal should be applied to clear. Otherwise what is point of using two continuous NOT gates (1 inside NAND and 1 in active low bubble) before applying signal to flipflop cell.

[@EngineeringFunda]

Bubble means active low

[@srujana9756]

I think for active low clear (if clear=0 then output will be zero) so if we give nand gate it makes all output to '1'..so I think AND gate is correct for this circuit

[@shamimhasan8302]

Thank you Sir from Bangladesh.

[@EngineeringFunda]

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[@gamar1226]

Thank you professor

[@EngineeringFunda]

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[@Thammudu_____]

1:05 there is no moment in hand so I thought my video got stuck but actually what happened 😂

[@mahadevc9880]

Best explanation

[@EngineeringFunda]

Your positive comments motivates me. Teachers like me just wants positive comment from student. Love from you guys means a lot to me. My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.

[@SaiKiran38252]

Excellent explanation.

[@EngineeringFunda]

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[@comforttutorials4286]

very helpful....thank you

[@EngineeringFunda]

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[@mohithkumar4083]

Well teaching sir

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[@muntasirmoon9188]

thanks ,understood

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[@VAISHNADEVIGECEUG-]

THANK YOU SIR

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Your positive comments motivates me. Teachers like me just wants positive comment from student. Love from you guys means a lot to me. My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.

[@karansaini4384]

Thankyou sir❤ NIT Jalandhar

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[@chinni949]

sir please make problems on digital electronics for gate

[@EngineeringFunda]

See the playlist, you can,solve any questions on GATE as well.

[@ashishkumarsharma1323]

sir i have a doubt! what happens when clear is 1? like in the before cases when the output Q3Q2Q1= 010 or 101? and will it stop after 110? why wont it go till 111?

[@ganitacademyengineeringeng4153]

When you use active high clear.. 101 should be given as inputs to And gate

[@ganitacademyengineeringeng4153]

After 101,it goes to 000..because all the flipflops are cleared or reset

[@yashkataria2992]

If any one input of nand gate is 0 then the output is 1 so this nand gate will give output as 0 only and only if the input to nand is 110 so when this condition come then nand will give 0 as output and this 0 will goes to clear and reset the counter

[@ManishSharma-pe7ip]

0:33 0:37 0:37 0:39 0:39 0:43 0:43 0:43

[@logacreationchannel2693]

Thankyou sir .

[@EngineeringFunda]

Your positive comments motivates me. Teachers like me just wants positive comment from student. Love from you guys means a lot to me. My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.

[@sameerbilla515]

Sir make video on logic families... please!!!

[@EngineeringFunda]

I will definitely make it but it will take some time.

[@ManishSharma-pe7ip]

0:05 0:11 0:13

[@takefocus2313]

5:05 ..Sir please tell Me..What is LSB and MSB

[@EngineeringFunda]

Most Significant Bit is MSB and Least Significant Bit is LSB

[@harvey2355]

sir is that any reason to use t flip-flop for design asynchronous counter. which other flip-flop can be use for design asynchronous counters.

[@EngineeringFunda]

It gives advantage of toggle and counter needs that only

[@harvey2355]

@@EngineeringFunda can I use any counter for asynchronous as well as synchronous

[@ganitacademyengineeringeng4153]

We can also use JK flipflop..with J=K=1

[@ganitacademyengineeringeng4153]

@@harvey2355 For asynchronous u need to use jk or T fliflop..but for synchronous u can use any

[@Thammudu_____]

@@ganitacademyengineeringeng4153 u r giving the reply but not admin great to see such people like you

[@vimala8508]

For modulo 6 counter we should not take 1 1 0 state.we should stop at 1 0 1 and take clear accordingly???

[@EngineeringFunda]

It will not take 110, it will clear FF at 110

[@vimala8508]

@@EngineeringFunda but unless the state is 1 1 0 how will the clear NAND Gate take it.?

[@yashkataria2992]

@@vimala8508 state will go to 1 1 0 but as he goes to 110 the clear will do his job and make the output 0 0 0 if we make it for 1 0 1 then it will not count 5 instead of 5 it will give 0 0 0 that's why we take 1 1 0

[@vimala8508]

@@yashkataria2992 thanks

[@rohitkrishnan8249]

So if it changes to any other module counter the circuit diagram changes right?

[@EngineeringFunda]

Yeah

[@TusharKumar-iu4nt]

Sir so we can make all these counters by the use of any flip flop?? Only thing is that its connections change...

[@EngineeringFunda]

Yes

[@SMITPATEL-px7um]

can you please help me i need to design n-bit sunchronus counter please help me

[@EngineeringFunda]

Go through my video on synchronous counter

[@Force_of_nature_007]

there is an error here, when 001 input, clr will happen

[@TehreemMalik-ge2du]

Sir snd me your pen collection I like it 😂

[@EngineeringFunda]

Mitsubishi ball point pen

[@MRGAMING-xc8mw]

Thank u sir

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