[009] DSLogic Logic Analyzer Review and Teardown

Review, teardown and experiments with the DSLogic Plus 400Msps 16-channel logic analyzer.
Show Notes: opentechlab.org.uk/videos:009...
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[@gtgarage]

Apparently, most of the comments are quite old so I'll add something a bit more up-to-date. I have a Bitscope that I've been using for a while and found that once I got into more complex and much faster components the Bitscope BS325 and BS10 didn't, or wouldn't, do the job. I almost went for a Saleae Logic analyzer and still may do that, but the DSLogic Plus was in the price range to try and also in the price range to not feel too bad if I needed to replace it with the Saleae if needed. I'll say up front, this was a good buy. This is the 16 channel unit with a full complement of fly wires (shielded) and lots of EZ-Hook type clips. They didn't say EZHook but the quality is more than comparable. I purchased more EZhooks in more colors to make things easier. The DSLogic unit also came with a nice zippered semi-hard case and the USB cable with the 'C' type on the business end. Overall, it works very nicely with the DSView or Pulseview app. The DSLogic DSView compiled perfectly on my Debian v10.6 amd64 box with no problems other than needed to install a lib or two. I used the Pulseview .appimage and it also runs without issues, only needed the driver from the SigRok site specifically for the DSLogic Plus. The only item that I would like to see resolved in BOTH *Views is to be able to display ascii characters in more of the protocol decoders. I see that the UART decoders have that option and I'd like to see it in a couple of others, CAN and I2C. Not a show stopper for either one of these, but it would be a nice feature. Maybe there is a way to do it that I haven't found yet. The producer of this video apparently has ties to the Pulseview/SigRok environment so I'll try a contact for more info. Overall, good buy, exactly as advertised and DSView and Pulseview run and DSView compiles without issues on Debian v10.6.

[@hullinstruments]

Awesome and great info! Thanks for taking the time to type that out. Hopefully he'll come back to his channel one day and make some more content because it really is great

[@hullinstruments]

A few days after my above comment he posted a video for the first time in years. So glad to see him returning. When it comes to tools like this... If it starts out to be somewhat useful and intriguing... Then the community will jump in there and try to open source everything and get it working in ways that would be difficult for the original developer. Having hundreds or thousands of eyes and specialists using something like this... Tends to help get the code and software side working perfectly after a few months or years. Which would be tens of thousands of hours of work if the original developer tried to perfect everything themselves

[@edward_grabczewski]

Great review. I wish my lecturers had introduced transmission lines as clearly as you've explained it here.

[@StuartCGadgetRev]

Another fabulous video!

[@coolwinder]

So informative video, keep up!

[@tilemachospapatheodorou5173]

That's not a review.. This is a complete class for some course in a EE study program! I think he is the ideal professor we all wished to have during our undergraduate degree, but we never had the chance to meet! Great work!

[@hullinstruments]

Exactly! I hope he does some more hardware based tutorials in the future

[@MrChasekennedy]

this is an impressive tear down/review.

[@SomebootyElse]

Awesome video, I like your explanations.

[@Graham_Wideman]

I'm liking this channel, and admire your work on sigrok and pulseview! I have a couple of questions on this video, coming up.

[@OpenTechLab]

Thanks! And thanks for your other comments.

[@q12x]

superb explanation !

[@MiH1IT]

Ordered this one just a moment ago. After that I checked YT and saw this video. I'm glad this review ended up in a positive way and I did not find out that the analyzer, I just ordered, is bad :) So far, I've used Saleae logic (original), but sometimes it happens that it can't keep up with the sample rate (even when not using maximal one), probably because something else tries to communicate on the usb bus. So I'm looking forward to this one, with a memory and compression. I've also checked the PulseView and it looks very nice. Those decoders are awesome. When I was about to finis testing it, it crashed, but still pretty awesome. I will try to see if I got a core file and try to debug what happened, if possible. Anyway, great video and great software!

[@nicoladellino8124]

Very nice video, tnx

[@g3i0r]

Hey, nice review, but I have two questions about the probe wires: 1. Is it possible to use the logic analyzer with "normal", flying leads for low-frequency applications? I imagine the coaxial leads can be a little annoying with their two probe points in this case. 2. I assume that even though each probe has its own "ground" probe point, that the ground points are not independent of each other?

[@OpenTechLab]

+g3i0r 1. Yes it's possible. You would just have to figure out how to attach the leads to a 0.05" header. Easy enough to make something nice by getting the mating 0.05" pin-header and solder and heat shrink some flying leads on. Also with the coaxial leads at low speeds it's not essential that every ground be connected to the device under test. 2. The ground connections all go to the same ground plane inside the logic analyzer. The benefit of having lots of them is that it means that the ground current can take a direct path to a ground close to the attachment point of each input channel - which is a very small current loop. If you have just one ground wire shared by all the channels the current path can become less direct - which is a large current loop, which adds inductance, which will block high frequency clock signals, short pulses, and sharp edges, because inductance looks like a high-impedence i.e. like an open-circuit to the high frequency component of the current.

[@univok9892]

Because I cannot look up the device settings in pulseview unless I have a "real" DSLogic connected to my PC: Is external clock, buffered mode and filtering meanwhile supported by pulseview?

[@danielh.8836]

I wonder how they are doing the adjustable threshhold thing. After some research I found out that the FPGA has an integrated ADC that they probably use. They claim the threshhold is variable from 0 to 5V, but the input pins on the FPGA are rated for a maximum of 4V so that is also the maximum voltage that could be measured by the ADC inside the FPGA. Does that mean they are just feeding the FPGA 5V even though it is not rated for that voltage or is there something else going on that I am misssing?

[@DaveCurran]

Can you recommend a supplier of the better probe clips you were using in the video, the ones on my DSLogic Pro are the rubbish ones.

[@OpenTechLab]

Yeah I did a segment about this in video [001] @ 34:46. I use EZ-Hook XKM series. You can get a set from DigiKey for $26. Sigrok has a more exhaustive article about the different probe products on offer: sigrok.org/wiki/Probe_comparison

[@youssefsallak3339]

Thank you very much for this valuable explanation. Can I measure a pulse in nanoseconds or even picoseconds? What are the tools that I should use? I hope you will answer me. Thank you again

[@HansBaier]

For nanoseconds you need a medium range scope and for picoseconds a high end oscilloscope

[@XerxesGustav]

Excellent video, thanks for you time and effort Im surprised they have the 7.6k ohm pull down resistors on the inputs. This would be enough of a load to affect for example I2C lines with 4.7k or higher pull up resistors, i.e with a standard 4.7k pullup to 5V it would with the DSlogic load only pull up to around 3V. This seems very weird to me on a logic analyser. Could anyone confirm that the value is indeed 7.6k ?

[@ReX0o0]

I was surprised too, and right now I'm measuring 107kR pull-downs on each channel on my DSLogic Plus (bought 1.5y ago). Each lead has itself a 100kR resistance between its tip and its header. Both create a resistive divider and halve the signal present at the FPGA input.

[@eddedwards9879]

On the subject of them violating the GPL software license... Business startup rule #1 charge ahead, deal with compliance, regulations and licenses when you have time and only if the company is successful, otherwise it does not really matter because the company is dead. My guess is they never thought ether way about it they where literally trying to get the product out the door as fast as possible.

[@jankopesic4768]

Great review! Do you know what the difference is between DSLogic PLUS Logic Analyzer and DSLogic BASIC Logic Analyzer, that are being sold on ebay?

[@OpenTechLab]

+Janko Pesic I think the basic is the same hardware as the plus, but with no sdram

[@JtWhissel]

Anyway to get the raw analog signal from this guy? Just got one and not seeing anything. Or at least measure the voltage?

[@OpenTechLab]

It's a purely digital device - it can only show you 1s and 0s depending on whether the voltage is above or below a threshold. What's the internal supply voltage of your device-under-test? You typically want to set the threshold to half the supply voltage.

[@Zeigren]

They still don't seem to have it up on their website? I can find it on eBay easily enough, shipped from China. Is there a more official source to get them from?

[@bruhdabones]

Just use their website. Trust me, I wasn't sure my self, but I did it anyway and their website works fine.

[@simbeault5]

Cuold be possible to bypass 32mb SDRAM by a micro SD module ? To increase buffering from 32mb to 64gb.... And just to know... about usb type-c if can give more result to have a type-c cable at each end to bypass the usb pc plug.... Not sure if it's make sense what i am try to say.

[@angelovitale3908]

What software did you use?

[@paulschreiber9384]

When will the FX3 chip be supported by sigrock? Used in the 32ch version.

[@st3ddyman]

I purchased one of these from the officiall store, and I have an odd issue with the automatic measurement function (though it could be the capture). No matter how fast or slow a frequency I sample, the measurement of the period / frequency varies constantly when I hover over the samples and move left and right between pulses. This is using buffer mode or streaming mode. Even frequencies as low as 1Mhz sampled at 400Mhz show the issue. Even VGA hSync pulses do.

[@st3ddyman]

For example, measuring a 17.734Mhz clock, and it randomly alternates between 17.34Mhz and 18.18Mhz even when sampling at 100Mhz or 400Mhz.

[@mrechbreger]

@@st3ddyman I have a similar problem here... 1000000000101111 - 500 1000000000010111 // corrupted 1 1000000000101111 - 500 // reconstructed this is using their latest device with the pango FPGA. It's difficult to analyze the data stream due to the corruptions, and they seem to come up regularly.

[@andreich8274]

Hello Joel! Great quality of review! Impressed.... Tell me please how expensive logic analyzer cope with line reflection when 50 Ohm termination on the scope end is not possible due to device under test loading capability?

[@OpenTechLab]

+Andrei Ch I've never used one myself. My guess would be active probes - with a buffer connected to short probe leads, retransmitting up a ribbon cable to the instrument

[@richard7crowley]

Has DSL fallen on hard times? Four months later and the DSLogic Plus is still not listed on their website. And the reports of ordinary flying-lead "probes" seems like a down-grade from the coaxial cable was reviewed in this video. OTL, you have a fabulous YT channel, worthy of an order of magnitude (or two!) more subscribers.

[@OpenTechLab]

I don't know what they're doing. I like the probes on the Plus, and the price/performance is great, but the company are operating in a really shady way. Thanks for the encouragment! Next stop 10^4 subs.

[@ghwizz]

@@OpenTechLab surely the important numbers are 2^x - looking forward to 32768!

[@muhdiversity7409]

I bought one of these things on eBay. It does not come with the coax so I'm guess there are a lot of fakes floating around out there.

[@muhdiversity7409]

I guess I only have myself to blame ? or was this a design change ... the website still shows coax. what I have is leads with one ground per connector which doesn't make much sense after going to the trouble of providing the grounds in the first place. I guess a lot of things on eBay from China could be considered suspect, however, after buying and waiting for a long time mine was shipped from some place in NJ, USA. I'm of a mind to file an eBay complaint.

[@hullinstruments]

You can check out digilent and they're shielded coax probes they sell for the analog discovery kit. It's a higher speed upgrade than what normally comes with the kit Last time I bought them a year or two ago they were really decent for the price and super cheap

[@AttilaAsztalos]

I've seen the original Kickstarter too and of course envied the large built-in buffer (compared to my OLS) but I have a serious issue with the DSLogic not supporting any kind of run length encoding as far as I know, which would greatly aid capture of fast bursts of signal with significant gaps between them - and that sort of thing happens more often than you think. Naturally, one might think with that much RAM there's no need for RLE - and one would be quite wrong. When you sample at four hundred million samples per second, guess how long will your sixteen million 16-bit words last...? A fraction of a second. Whereas even the ludicrous twenty-four thousand bytes or RAM in the OLS should last around two seconds if there's not much happening (and could last immensely long, with the same paltry amount of memory, if only they implemented 4-byte counters along 1 and 2-byte ones, although I'm not sure the sump protocol the OLS uses would allow that)...

[@OpenTechLab]

+Attila Asztalos There is an opportunity here to start an open logic analyzer firmware project for sigrok. It's conceivable that it could be made portable across multiple devices. At the moment we just extract the binary firmware from the vendor applications with scripts in sigrok-utils. So it would be much better if we had an open firmware, that would support all these features - depending on the capacity of the hardware

[@medvidekkrupicka1404]

Hello, Great review, many thanks! I am considering to uprgade my DSlogic to DSlogic Plus by soldering a SDRAM to the footprint on the PCB. But then I will need the device to enumerate as DSlogic Plus on USB bus, therefore I need to know at least the PID of the Plus version. Could you please publish the EEPROM configuration data from your Plus version?

[@OpenTechLab]

All the VID/PIDs are listed in the sigrok driver source code: bit.ly/2ALm3oC . I'd really like to know if a hack like this works. Can you post your findings somewhere? Maybe in the sigrok wiki?

[@TheFreebsdfan]

I just ordered a DSlogic box, but on closer review I think I"m also going to be getting the basic model rather than the plus model. I'm afraid it's too late to correct that mistake. Is there any reason to believe that the bit image is the same between the basic and pro? I doubt changing the VID/PID will be enough. If someone with a pro unit could read the contents of the EEPROM then an update should be doable. The SDRAM chip is readily available and cheap.

[@TheFreebsdfan]

My DSLogic box came today and as I expected it does not have the SDRAM. I can answer my own question... all of the .bit files come with the software downloaded from the Dreamlogic web site so we're good there. I'll order an SDRAM and see if I can upgrade mine.

[@TheFreebsdfan]

I finally succeeded in updating mine. It took a couple of days. The needed FW and bit files are included in the Linux release. The biggest problem is that the EEPROM's write protect pin is ACTIVE. Luckily with a pull up resistor so you can easily jumper it to ground, reflash the EEPROM and then remove the jumper. A 16M capture buffer is NICE! Sure beats my OLS.

[@spawnlink]

Any chance of a video showing the upgrade process?

[@NSAwatchesME]

what can i say? you know your shit son

[@rondlh20]

If the only difference is the input stage, then you could just remove the input filter components to upgrade to the plus version

[@JohnUsp]

24:35 - Rigol DS1054Z is a 50MHz oscilloscope with upgrade to 100MHz. What is the magic to read 200MHz? And also the probes are for maximum 150MHz.

[@arturslab7102]

You mention in your video that you're using a 200MHz scope. It appears that you're using Rigol 1054Z. Only improvement I'm aware of for this scope is 100MHz. Did you mis-speak or is there really another fix to bring this scope to 200MHz? If the latter, can you share the source?

[@user-yk6tc1ey7x]

Можно им postcode посмотреть на ноутбуке? Не пробовали?

[@rlgrlg-oh6cc]

Adding a way to convert captured data into microprocessor opcodes would be very useful for people debugging old devices with it. I know it's a big project, as some way that people could write "dis-assemblers" for different processors as plug-ins would be needed. Possibly this same facility could make it possible to display the data in other "decoded" forms for other applications, and not just as uprocessor op codes. I know that serial, SPI, etc decoders exist, but I am thinking of something that would be programmable, and not a fixed decoding.

[@OpenTechLab]

There are a couple of examples of this already. There is a decoder for z80 opcodes: sigrok.org/wiki/Protocol_decoder:Z80 , there's also a decoder for ARM TPIU/ITM/ETM tracing: www.sigrok.org/blog/new-protocol-decoders-arm-tpiu-itm-etmv3 - this can print decode the logic data to give you the line number of code that is being executed. Is this related to what you had in mind?

[@rlgrlg-oh6cc]

Yes. Now we just need 6809, 8051, and a few other ones. Thanks for the information.

[@OpenTechLab]

rlg42 rlg42 Sounds like you just volunteered! If you want to contribute, I can recommend decoder writing. Usually it makes for a fun weekend project. the first step is getting some sample data for the sigrok-dumps repo. Then the python hacking should be pretty straightforward with the z80 PD as a template. Join #sigrok on irc if you'd like to discuss more about how to get started!

[@rlgrlg-oh6cc]

Pretty busy right now with other projects, but maybe at some pt I will look into this. Thanks

[@kwissiekwissie]

Not for criticizing but for me to understand; You said you use an 200Mhz oscilloscope. but in the frame it reads 50Mhz... What do I not understand?? 24:47

[@bruhdabones]

Can confirm, Plus is still what ships & Pro is what is displayed on the site. WTF.

[@oliverer3]

They have a version now that goes up to 1Ghz and I'm honestly struggling to come up with a use case where you have a GHz signal and a logic analyser is the right tool for the job. USB maybe? Though I think that still only has a few hundred MHz clock.

[@Erhannis]

I mean, I'm currently trying to debug some probable timing bugs (missing clock windows or something), and I'm considering getting one of the fast ones so I can be sure I'm not getting more aliasing issues. Granted, I'm a noob in this domain, so I don't actually know if this IS the right tool for the job. But it's currently among my best guesses.

[@oliverer3]

@@Erhannis For transients and timing issues I'd probably have used an oscilloscope but for very high frequency stuff trying with a logic analyzer first would certainly be cheaper if you don't already own the equipment.

[@fir3w4lk3r]

Nice review! Are there clones of this device?

[@OpenTechLab]

Not that I've seen. It would be hard to make money off a clone, because the device is already being sold on thin Chinese profit margins. Also western devices are more attractive to cloners, because you can piggy-back on the advertising of the original product, whereas the DSLogic doesn't have much of that.

[@naasikhendricks1501]

My sigrok keep crashing... DSlogic removed the Schematics

[@slap_my_hand]

35:25 4 channels (0 to 3)

[@DoRC]

Their website is broken on Android.... That doesnt make me feel very warm or fuzzy

[@OpenTechLab]

They also sell on AliExpress and eBay. Though beware that some of the listings are unclear whether you will receive the DSLogic, the Pro, the Plus, or the Basic (which is the Plus but with no SRAM).

[@mickn6619]

OpenTechLab I can confirm that, buy DSLogic pro, get DSLogic basic without sdram chip

[@kwccoin3115]

Langauge / Ecocomics / Culture ... may be. But the reason why you fit it backup the main stream is that you will lose the updates in there. Still, it is harder if one work only one device and ask them to fit it back and they have to get their competitive device. I think that is quite an interesting game in play.

[@JaroslavGrochal]

Is there anyone who has experience with USB Logic Analyzer ALIENTEK DL16 Plus ($125, 16ch, 1GHz@8ch, 500MHz@16ch, 3.5Gbit sample buffer, PGL22G chip) and can compare it to Saleae and DSLogic products, including the SW GUI? Thank you!

[@Graham_Wideman]

On these videos where you investigate bandwidth-related topics, might be helpful for viewers if you would throw in a comment about the gotcha that scope probes set to 1X have greatly reduced bandwidth compared to their nominal spec, which is for their 10X setting. I see that you have your probe set to 10X (that is, divide-signal-by-10), and the scope configured to read out in compensating x10 values.

[@OpenTechLab]

Yeah, that might be something I can put in as an aside later on. For me it's a learning experience trying to pitch these videos at the right level. I want to inform, and also entertain. If I talk about every little thing the video becomes very long and convoluted. If I skip over details based on assumed knowledge, then the videos will be meaningless to many of the viewers. If thinks are working well, hopefully the video will jump-start the viewer on the topic, and they can search out any information that I gloss over, or I'll come back to it as part of something else later.

[@azariayehezkel9064]

its not alive analysis?

[@Mtaalas]

Umm 200Mhz oscilloscope? Rigol specs this family at most to 100Mhz...

[@OpenTechLab]

You're right. My mistake. Though the captured signal is well below the Nyquist frequency, and the attenuation at this frequency isn't very severe, so I believe the results are still valid.

[@bleckers]

"100MHz" *wink* *wink* ;)

[@examplerkey]

As much as I like your videos, I must say that face saving culture has nothing to do with open source software contribution. Chinese lack of contribution to sigrok is mainly due to economic and time constraints. On the other hand sigrok supports a whooping 241 devices! For a small dev team, this is an impossible task to meet all the devices plus future ones. So, they concentrate on their own product and they do let you view or use their codes, isn't that open source enough? Maybe not for you because you're at a different level or caliber.

[@hullinstruments]

I feel the same way. Well said. I think it's just a matter of perspective. A lot of people who work around this type of stuff have different views and perspectives on open-source versus proprietary and the biggest contention of all... How they view the Chinese culture and the reality it has on their citizens. I've been to shindig then, I worked in development cycles helping different folks with a wide range of weird and interesting things. So much of their culture and manufacturing is just written off to malice and the inability compared to their Western counterparts. When in reality that could not be further from the truth

[@DrTune]

For $60 at present on Aliexpress you get the Basic version, which can be upgraded to Pro with a little hackery: www.eevblog.com/forum/testgear/upgrading-dslogic-basic-to-plus-without-eeprom-modification

[@Graham_Wideman]

At 38:00 you discuss Nyquist frequency and sampling rate, using 200MHz square wave and 400MS/s capture rate as an example. Then at 39:20 you demo this case, and the capture looks pretty poor. But it looks to me like that demo must not be using a 50% duty cycle, probably more like 75% high, given the extent of time that the plot stick's high. Statistically, a square wave at half sample rate with substantially non-50% duty cycle will case the sampling to "miss" a substantial proportion of the alternations of the signal. An alternative view is that sampling a square wave whose frequency is half the sampling rate (ie: at the sampler's Nyquist frequency) will be borderline successful if the square wave duty cycle is 50%. But it the duty cycle is different from 50% then the proportion of energy in harmonics above the Nyquist frequency is enough to incur aliasing sufficient to show up in the logic analyzer's "1-bit A/D" result.

[@OpenTechLab]

Exactly. The duty cycle isn't precisely 50% to begin with, and with rise-time the wave form is a rhombus-wave not a square-wave, so unless the threshold voltage perfectly bisects the waveform the duty cycle is going to look even more unbalanced. So you're really pushing your luck if you try and go above half-Nyquist with an asynchronous logic analyzer - the more oversampling the better.

[@jcbritobr]

Only works with ds logic. Pulse View works with anyone driver.

[@FooBar89]

this hardware is crap, do not get it, huge disappointment, I basically throw mine in the garbage

[@OpenTechLab]

+ThinkLearnSolve What problems did you have? Did you have the Original, the Pro, or the new Plus model?

[@FooBar89]

the connector broke completely off, as it came out of the box, it was loose and desoldered, the way they designed it, it would been impossible to properly stay in place; they used an iPod style connector, then other attachment that plugged into the logic analyzer was just made of metal and stitched together with over the counter tape; the probes broke off on first use; do not recommend, very poor quality, they have a fancy website, but the actual product is crap, use Saleae Logic Pro instead, that is actually a decent product, this thing cost as much as that, but comes nowhere close, they lost my trust forever; I don't know which model I had, the Pro I think

[@sixzero9006]

What's the difference between these models? I've got mine from a ebay seller but it was only the basic version. Is it possible to do a SW upgrade to Pro with the Pro Firmware?

[@TheBadCode]

1. Is a chinese clone of Saleae Logic devices. 2. Software driver not certificated. 3. Software use at your own risk. Security issues. 4. DSLogic company transparency is zero. Where and who are the developer? No information, no pictures, no location, nothing. Contact information only a e-mail address. 5. Rarely or zero acitvity on DSLogic website and forum. Result: better you save money and buy the original Saleae logic analyzer from a transparency US company with friendly developers and support. You will be happier.

[@erickvilca6705]

Saleae logic cost 10 times more than this product, luck with saving :)

[@TheBadCode]

Erick Vilca Alternate: Digital Discovery from Digilent, 200$. kzbin.info/www/bejne/mp-8oJSve7iinLM

[@erickvilca6705]

thanks for informing me of the product. I will start saving.

[@truezulu]

They are leeches... Steeling what is free, to sell it on. Dont tell me they didnt know... Come on...