PAL implementation | Digital electronics

[@anushkagupta7607]

Your explanation is so amazing

[@lokendrasinghlodhi718]

why we are programing the ANG gate by Dot instead of Cross cause generally it means as it's fixed not programmable right?

[@SamaSama-jr7xb]

Thanks for excellent teaching.. it is so helpful for the semester exam❤ thanks a lots sir

[@karthikyapala5636]

Finally I understood ......tqs..

[@dremorrison112]

this video is awesome.

[@jiezhao2758]

Excellent!

[@ahmedwagdy2018]

dude you are awesome thanks

[@mkkoushik1965]

Awesome sir

[@albatrossgeez6637]

great explaination

[@SE-ETC-ET-RudrakshaThorat]

Thank you so much

[@comradegaming4611]

👍

[@EEP250]

why did we use the feed back with w i don't get it

[@user-ux1mb7nt3f]

Thank you so much brother❤❤❤

[@killerboy-mz9bd]

thanks❤

[@user-nm5me7km9u]

Thanks brother❤

[@alsinarelaxationhome6291]

How did you get the numbers you added to the k map when generating the PAL

[@eclearn2270]

At what time duration in the video you are having doubt?

[@alsinarelaxationhome6291]

EC Learn 1:12s while you were writing the Boolean functions didn’t understand how you got the numbers £ 2,12,13

[@eclearn2270]

I apologize for the delay in responding. PAL is similar to ROM which stores data in the form of 0s and 1s. In our case, [A B C D] represents the address and [w x y z ]are data bits in each memory location. In this question, the memory data are represented in the form of minterms ( for address ABCD= [0 0 0 0] respective data in that location is wxyz=[0 0 1 0])

[@_Joshua__]

Thankyou Sir 😢🎉

[@esraygt]

thanks a lot sir

[@smoker_sukil1026]

Thank you sir you are explaining it better then our professor 😂❤

[@caDet07]

Why do we create this table can't we make it directly to the circuit after Boolean expression has found

[@lokendrasinghlodhi718]

🙂

[@koushik_bigil_7]

Sir if there is no common terms then what we have to do sir

[@eclearn2270]

If the number of minterms is 3 or fewer, you can implement it using one standard structure consisting of 3 AND gates and 1 OR gate. However, if the minterms exceed 3, you can split the expression into groups of 3 minterms and assign a temporary variable. Then, you can use 2 or more standard structures and connect them using feedback. Example: x= ac+bc+ab+ad+abc let f = ac+bc+ab (implement using a standard structure) x= f+ad+abc (where f is feedback of already implemented structure )

[@koushik_bigil_7]

@@eclearn2270 can you explain with a video without common terms sir please 🥺🙏🏽

[@mantenapragnyabala1711]

Sir why 3rd and 6th product term is taken in the table.can we ignore it as it is not there

[@eclearn2270]

In this example, standard PLA consists of 3 AND gate followed by an OR gate. However, for the expression w and x, which has 2 minterms terms, that's why we made 3 and 6 untouched. In a PLA, while the physical structure remains fixed, users can program or configure the connections between the inputs, AND gates, and OR gates based on their desired logic function.

[@_sanskriti903]

22:26 sir i have a doubt that why r u taking w as a feedback ?

[@lohithreddym4]

For x

[@emirhantarba4597]

can u help me?? ı have question about Eprom

[@user-dw3ih2ep6z]

Why to take feeback??

[@eclearn2270]

The standard PLA structure has a fixed format. In our case, we considered using 3 AND gates followed by one OR gate. However, since we have an expression with 4 minterms, it's not possible to implement it with just 3 AND gates. Therefore, we split the expression and created a feedback loop.