PLA implementation | Digital Electronics

PLA implementation | Digital Electronics

[@SPR._.tamizhan.]

Engineering students likes here ❤

[@harshitsharma2262]

thank you sir best video available on PLA implementation

[@gamingultimate7489]

VERY NICE AND USEFUL EXTRAORDINARY SIR

[@vamsivamsi2339]

It's perfect and easy to understand.....

[@K_A_R_A_N__KK]

Tq sir it understandable in such a way that my friend saw this vedio and explained me

[@rajvaghela4378]

Thank you sir very helpful

[@SravaniAnil]

Watching 2 hours before exam.. thanks a lot bro 😍

[@user_137_annak]

Thank you soo much for your explanation sir....I'm very grateful to you..🙏🙏🙏

[@pawansapavath6605]

Sir can u explain how u can take a f function

[@pradeepnarayan4574]

Excellent👍

[@SidTheGr8]

Lovely and extremely clear explanation

[@nagaphanindra6369]

how do you are writing F1..... I cant understand

[@annkitplays8925]

Thank You Sir Very Helpful

[@kovvurusubhan4876]

Osam teaching sir

[@adhi7883]

Is it necessary that we need to consider compliments of fuctions

[@adhi7883]

*functions

[@eclearn2270]

Yes it's compulsory, then only we can implement it using less number of gates. That's the main advantage of PLA implementation

[@dhruv6183]

@@eclearn2270 its not necessary of u convert the kmap expression to minimal form.

[@sunnyparmar2809]

Mast explain kiya sirji❤

[@jayprakashmahato3665]

please sir make a vedio on PLA implementation of three funtion.

[@laxmiannal3323]

Thanks for your teaching

[@salsabeel1077]

thanks a lot sir very help full

[@gta5678901234]

very clearly explanned!

[@kshitizshrestha9398]

Nice Video

[@priyadarshisingh1380]

Sir, F1(bar) should be written as POS(product of sum form). Here u have written it as an SOP form. Please correct me if I am wrong.

[@eclearn2270]

here POS should be written in the form of SOP(bar) [both are equal]. If you solve SOP (bar) using DeMorgans law you will get the same answer as POS form

[@gayatrijuttuga3444]

@@eclearn2270 sir even though it is pos in SOP form then also your answer something went wrong I think kindly give brief explanations

[@shortWM]

❤️❤️

[@snehamanoj8566]

Simple explanation..🤗

[@SaravanakumarIT]

Sir pls make a video on design of asynchronous sequential circuits

[@eclearn2270]

I have uploaded check that.

[@chinmayamj5615]

Thank you so much sir🙏

[@carmaniac5439]

Is this 3x2x4pla?

[@proryoth4796]

Thank you sooo much sirrr!!!!!!!!!!

[@ejjiganinavya2519]

Thank you so much sir

[@bhusandotel5866]

cant we just use inverter replacing XOR gates at end?

[@eclearn2270]

No. Because it's a user programmable device the end user will decide whether the output to be inverted or not.,

[@baranaslan9909]

You group the maxterms in the karnaugh map, but you write it as minterm, what is the reason?

[@eclearn2270]

I am finding F(bar) instead of F. if you are trying to find F in maxterm, then you can group 0's and form POS expression. But in this case i am writing the same as minterms because we know {F(bar)}(bar)= F, if you simplify the expression using Demorgans law you will get F interms of maxterms.

[@nawrin6636]

Sir if here f1=A then how much line i have to draw 1 0r 2?

[@eclearn2270]

Whatever maybe the value input should pass through an AND gate followed by OR gate finally through an XOR gate. If you have two function (f1 and f2) then you need to have two OR gate and two XOR gate. If you have one function (f1) then you need to have one OR gate followed by one XOR gate. Number of AND gate depends on minterms

[@nawrin6636]

@@eclearn2270 Thank you sir

[@Arunkumar-yl1yi]

Plzz make all videos of DSD

[@eclearn2270]

Soon I'll update..

[@Arunkumar-yl1yi]

@@eclearn2270 tq so much

[@mahaboobbasha123]

We can give it directly to OR gate na Why are we using ex oR

[@eclearn2270]

Exor gate act as a controlled inverter (not). To reduce the number of gates we use direct or inverted outputs. This can be done by EXOR gate with one input as O - for direct output and 1- for inverted output.

[@Kafi_relatable]

i didn't understand the k map grouping

[@Srkian.1]

Now , I got it

[@mariyanizami4904]

Why we r complementing the function

[@eclearn2270]

To reduce the number of gates required to implement the same function. ( Cost reduction)

[@mariyanizami4904]

@@eclearn2270 ok sir thank u so much

[@mdyeahiaahmed9713]

Thank you