PCI Express® 4.0 and 5.0: The Future of NVMe™ Technology

Presentation by Justin Wenck, Senior Technical Marketing Engineer at Intel, PCI-SIG

[@kortaffel]

Ah he got grilled pretty good at the end ;) How is OCuLink going forward? It would be great to have a single connector for inside and outside the case... I wonder if that will be harmonized anytime soon.

[@minova7077]

:O when PCIe 5.0 will be released?

[@TqSNv9R0iG5Ckxew]

It will be released one day after I buy a computer with PCIe 4.0

[@mikebenefield8477]

@@TqSNv9R0iG5Ckxew Yep!

[@fbifido2]

when will you create a new interface that is not backward compatible but leapfrog current technology by far?

[@christoffermaintz781]

No time soon. We'll need to ditch current materials first. Though I'd say 5.0 is a really bug leap; doubling of bandwidth just a year after the last doubling? Real nois. Though as you might've noticed from the video we also had a seven year gap without any advances or revisions, so it's... About time. Either way, PCI can't go and leapfrog current tech without CPUs doing the same thing at the same time; and they've barely even done a tiny hop in recent years. Thankfully AMD is doing good work now; while Intel... Yeah. Y'know.

[@Crista183]

I dont understand why i see in the road map pci 4.0 and 5.0 exit in the same year 2019...

[@ozy5332]

maybe intel goes pcie gen 5 in next gen