6 Horribly Common PCB Design Mistakes

[@PredictableDesigns]

Prevent mistakes by downloading my DESIGN REVIEW CHECKLISTS for the schematic circuit, PCB layout, and enclosure 3D model design: predictabledesigns.com/design-review-checklists-youtube/ And get your other free guides: Ultimate Guide - How to Develop and Prototype a New Electronic Hardware Product in 2023: predictabledesigns.com/guide From Prototype to Production with the ESP32: predictabledesigns.com/esp32 From Arduino Prototype to Mass Production: predictabledesigns.com/from-arduino-youtube/ From Raspberry Pi Prototype to Mass Production: predictabledesigns.com/rpi Want my personal help on your project? If so, check out my Hardware Academy program: predictabledesigns.com/Academy

[@sanjaybatra6593]

@@adamnowak8876 I agree, can you create a video for same with real practical example.

[@simonharris4873]

LOL. Had the mute on. A place I once worked at asked interview candidates to send in an interview video where they answered questions we'd sent them. Once guy send in a video with no sound. It was an IT job. We weren't sure if giving him a second chance was the right thing to do. Lucky your boss gave you one. :)

[@pyramidsinegypt]

For newbies, showing some KiCAD or Fritzing examples to illustrate how the mistakes look and how it should look would really help.

[@AstrosElectronicsLab]

I agree. As I use KiCAD, would be REALLY helpful.

[@Patrik6920]

he adresses problem in board design (potential), wich is very different from circuit design... for hobby projects it wont be a problem... thers no need to be concerned.. .. besides its rly really hard to show some of the problems.. to understand them and why require some deeper understanding of electronics (atleast maxwells equations) and preferably QED(Quantum electro dynamics) (effects of moving chages at high speed, time-dilation effects and time-charge quantum effects).. ..something most ppl will not understand, so, it would not be very enlightening for most, and probably just comfusing...

[@Allin7days]

Each items mentioned here takes years to master by itself. It's very little to do with layout tools, more to do with signal/power integrity theories.

[@Patrik6920]

@@Allin7days very much... it would just be adding cumfusion

[@adamnowak8876]

Why you want to learn basics on KiCAD? I know it is free. Nobody in professional company would use that knowledge looking through you resume as a possible newhire. Find a way to try professional software like Altium or Mentor or Cadence. Especially for Altium and to some extent for Cadence there is like a ton of tutorials. Mentor is pain in the ass :)

[@CZ350tuner]

Back in 2001, I was employed (by a UK based German company) as a PCB pre--production proof reader engineer, as in I checked over client's PCB designs before they were committed to production. I would then send them back a detailed report highlighting all the errors that needed fixing before actual production (in German or French). Apart from the occasional "forgot to send a mirrored image for the bottom (underside) of the PCB, ignorance of Kirchoff's Law regarding trace current limits, thus creating adhoc PCB trace fuses, was more common than you'd expect. One memorable designer expected to push just over 4 Amps through a power return T10 trace, which he'd narrowed in order to squeeze it past a component. Not all were bad, as some PCB designs were perfectly designed. It was the terrible ones that were hard work. those clearly designed by an inexperienced rookie, usually with every fault that you listed on one PCB. These could take one or two days to scrutinise. I'm just glad that I don't have to do that job anymore as I'm now retired, due to Parkinson's disease.

[@predatortheme]

the rookie designers were then hired by apple to build all the macbooks with the terrible self-killing board designs :)

[@lusher00]

I made my first PCB my junior year in college. I remember uploading the files and asking my professor when the feeling of panic and apprehension would go away. He told me I would start feeling better after I had done 20+ boards. I had done 10+ by the time I graduated and who knows how many since that first one in 2006. By now I'm confident that feeling will never go away.

[@Steve56179]

as a professional, when the order quantities go up, the anxiety increases too.

[@antecboy]

After 15 years of PCB design under my wings, with defense and aerospace projects. Comparing myself to my beginner days I would say a large part of these are for advanced designs and generally won't be understood by beginners. One of the most basic and important one to immediately start following is even if you don't understand exactly why is USE decoupling capacitors and place the decouling caps close to the sourcing and loading devices (ie. linear regulator's input and output and microcontroller's power pins). Explaining ground currents and planes is mostly going to be too much, when you're just focusing on getting the correct components into the schematic based on what you have available or are planning to buy, connecting them and then transferring that to the physical reality in the layout side and double checking that you used the correct packages and pinouts. I have made many mistakes over the years, some critical and some that could be fixed with a botch wire, but I kept at it, learned from my mistakes, learned to diagnose and find the problems and fix them for the next board version. Find an interesting project that feels challenging, but preferrably no overwhelming for your skill level and start making!

[@StrixTechnica]

I agree, but I think it's still worth explaining the why to beginners, even if they don't fully understand. Experience will fill in that understanding, but only if they know that there is something to understand in the first place! Failure to understand the why of what was best practice at the beginning of one's career is how those best practices become myths and traditions propagated over time. This is especially true of power distribution design and shielding.

[@batman137fed]

Excellent video, just one thing I usually advise is to keep a single ground plane for beginners. I have seen way too many digital signals crossing split ground planes and causing EMI, while in most circuits with a proper, single ground plane digital noise does not travel far enough to affect the analog signals.

[@paulromsky9527]

At 4:30, actually, we don't call trace length equalization lines "delay lines" we call them "serpentine lines", yes they both "delay" a signal using length, but delay lines is a term reserved for components (not traces) that delay a signal in various ways.

[@VndNvwYvvSvv]

Sharp corners are generally fine < 1 GHz or so. Multiple capacitors are generally just a holdover from THT days where there was significant inductance within the cap. These days, use the largest value for the package that's reasonable. Sometimes going up a package size gives you more options.

[@unknownhours]

Capacitors in larger packages are more stable too, so I prefer those anyway.

[@solderwickie]

Not if you're designing in the 10 GHz digital transceiver area. Multiple capacitors with different cases and values are still good practice there. And having the largest value for the package often means that you have a dielectricum which has a not so great temperature coefficient.

[@qno-oj3py]

Ceramic capacitors are voltage dependant. Sometimes a lower value with higher voltage yields higher capacitance.

[@Kalvinjj]

Designing a PCB this week and grabbing the appropriate boost converter capacitors I came across some relatively high value ceramics that I didn't even know where possible, didn't know something like 47 uF was possible in a freaking 0805 package but here we are. It's getting to the point you'll only need electrolytics in the AC-DC power supply section _when_ it's a high current PSU. Granted they were low voltage, like 25v or what.

[@Andrew-rc3vh]

Capacitors only have the specified capacitance over a particular frequency range, so it is common for RF circuits to have several to decouple the supply, as per one in each decade ideally. RF circuits are known for stability problems and parasitic oscillations. It could render the circuit illegal as it will create harmonics on unlicensed frequencies, like air traffic control!

[@mbak7801]

It is refreshing listening to someone who knows what they are talking about and explains everything with such clarity. Good PCB layout whilst notionally totally scientific has an element of black art to it. My experience of designing PCBs is low and whilst understanding everything you said when I look back at my efforts there are always areas that could be improved. Which is a polite way of saying they were crap. Thanks for your video, interesting and informative.

[@PredictableDesigns]

Thank you for the kind words!

[@xluoskrad]

I don't main English language but I understand over 90% of your video without sub. That's great! You speak and explain are great

[@PredictableDesigns]

Wow, thank you!

[@BrandonDrury]

Great video! Splitting ground planes is a complex issue. I default to not splitting the planes even for sensitive mixed signal boards.

[@PredictableDesigns]

Thank you!

[@y_x2]

Exact. Chip that has digital and analog ground usually are connected to the same plane.

[@IACooper]

Indeed. If splitting ground then care is needed - for a start no other tracks should pass over that split on another layer, they should be routed over the plane and 'around' the split. If you don't, then the loop area becomes large resulting in increased EMC emissions and reduced EMC immunity. The component positioning and tracking around SMPS circuits requires care to keep loop areas small to keep efficiency up and ripple down.

[@JBEEUD]

Both of the PCB design seminars I've attended this year have explicitly and repeatedly stated that ground planes should NEVER be split unless there is a definite, explicit, and demonstraightable reason to do so and well less than 1% of all designs meet that criteria. The primary thing to remember is signals couple to their closest return path which is (in general) what ever is directly under them in the PCB stack, plane or trace.

[@sanjyuu2298]

Exactly, more than a split planes you should care about having best ground plane possible and what you put in the vicinity of analog traces. Splits can make more damage than it's worth if you don't know how to make them properly.

[@fernwood]

I’m so glad I’m only a software engineer. You guys are kings among kings.

[@chargen7224]

yes i say its magick with them Wizzards and Sourcerers

[@TheParamotorGuy]

This was very good. After doing PCB design for years on RF circuitry, I still learned something. I haven't really given it much thought about proximity of inductors. Just positioning.

[@paulromsky9527]

At 5:54, Yes, impedance of a trace is not its resistance although both are measured in Ohms. Resistance in Ohms is a circuit's opposition to electron flow. Impedance is the "reactance" of a circuit in Ohms as high frequency signals propagate (and reflect) along the trace. The trace width, copper weight thickness, the thickness of the dielectric layer under it, the material of the dielectric, the ground plane under that, vias, nearby circuits traces, and if the trace is on a surface layer (micro strip) or "sandwiched" between power/ground plane layers (strip line) all factor into the impedance of the trace at a given frequency. Many people that layout PCBs in the defense industry are not electrical engineers and don't really understand Impedance and its effects, they think of the design only from a DC perspective and go mostly by the "rubber band" relationship of the signals and thus the design engineer has to spend many hours with the PCB designer to get the artwork correct. For example, even though you may have a clock that is only 1 Hz (1 tick per second), the edges of that signal may be very fast, say 1 ns, that is an AC component of 1 GHz - that is Radio Frequency - and thus impedance control and signal integrity need to be considered when laying out that signal trace or reflections in the trace can cause distortion of the signal that is so severe that the circuit will fail to work properly. Then there is coupling to consider. For example: that same clock trace should have sufficient distance away from other signals. Here, those 1 ns edges "transmit" like a brief radio pulse (agressor) and can "induce" a noise pulse into a nearby (victim) trace. Another issue is "series termination resistors" which MUST be placed as close to the device driving the trace. Because many PCB designers just go by the "rubber bands" they have no idea on which line is the driver and which is the receiver and they end up putting the resistor anywhere - which will have to be fixed after the design engineer "finds" the mistake. Most PCBs designers don't even look at the schematic and can't even see these requirements in the design - to them it is just a bunch of lines they need to connect and again the design engineer will provide notes of some critical signals but will still have to sit down with the PCB designer. Most high end CAD tools have constraints that you add to the schematic so the PCB designer is "forced" to route it properly even when I am not shoulder to shoulder with them at the moment. Using constraints frees up a lot of my time and insures a perfect PCB with little intervention on my part as the responsible design engineer. For example: I will place a constraint on the signal that drives the resistor to be no more than 300 mils long. The PCB designer will still get two rubber bands during placement, but as soon as it is placed too far away, a warning pops up to tell the PCB designer to move the resistor closer to the driving component pin. The PCB designer cannot modify the constraints, so they have no choice but to place the resistor properly and I don't have to worry about it being wrong because the Design Rule Checker will tell me if it was wrong (if it could have been, but it wont). If the PCB designer has a problem with a constraint, they call me, and then I decide if I can relax the constraint a little bit or not.

[@KyranFindlater]

A sigh of relief as I watched each point, feeling confident that I don't make those mistakes. I guess that's what experience and actually caring about the details brings!

[@malectric]

I came across a memorable one back in the 1980s. A computer video card, complete with "QC" sticker which had a copper bridge (unetched) between two tracks underneath the solder mask. A few seconds with a sharp scalpel took care of it and the card was working. How it passed quality control remains a mystery. A different one, this time heat-related I discovered in a guitar amplifier. The board was mounted vertically with the power amp heatsink placed directly below an LDR which served as the modulation element for the tremolo. Guess what happened to its resistance when the heatsink got hot. Yep, the amp faded out even when the tremolo wasn't in use; the modulating LED was simply switched off leaving the LDR in-circuit. There are many other design blunders I could list - too numerous to mention.

[@Milosz_Ostrow]

(9:25) "... the ground planes should be split." *_WRONG, WRONG, WRONG._* Putting air gaps in ground planes almost guarantees that a high-speed board will radiate like a demon and will never pass FCC testing, even in a metal enclosure. Take it from a EE who worked for years as a PCB engineer in the disk drive industry, fixing other engineers' failed PCB designs. Radiation is a function of current loop area and splitting ground and power planes forces return currents to find much longer, circuitous paths back to the source, greatly increasing loop area. For minimum loop area, if the high-speed trace is always adjacent to a power or ground plane, it acts as a microstrip and the return current follows the geometry of the signal trace while minimizing the current loop area. This is true even if the trace width has not been optimized for a particular transmission line impedance.

[@LearnElectronicsRepair]

If it is bad practice for traces to have right angle turns, then why is it OK for vias in the same traces to go vertically through the PCB? Shouldn't they go through at a 45 degree angle if it is so bad?

[@PredictableDesigns]

The right angle traces only have much impact for high frequency lines. But yes you are right about vias too so you have to be careful using them on some lines.

[@tHaH4x0r]

What you mention about the ground plane is 'old style design' and not recommended anymore. Firstly, in a 4-layer stackup it is recommended to have either the inner two or outer two planes to be ground, and conversely the other 2 layers a combined signal/power layer. This is because signals exist not in the copper, but between trace and ground return of said trace. By minimizing the distance you decrease loop area and reduce EMI and crosstalk. Secondly, groundsplits often do not help a design at all. There is the argument that sensitive low frequency analog return currents 'spread out' over solid ground planes, and hence could end up being mixed with higher speed digital return currents. However, doing a split creates two issues: Firstly you can inadvertantly create much longer loop areas, as obviously ground currents have to circle around. Secondly, connectors need to be relatively closely spaced together. This is also to reduce EMI, as any voltage drop over the ground plane can make attached cables act as dipole antenna. Also your statement about things going back to the 'powersupply negative' is not very relevant if proper decoupling is used. For EMI/crosstalk we are talking high frequencies. In those cases decoupling capacitors present a low impedance return line, which is close to the source and destination ICs, and has nothing to do with the power supply anymore. Or in other words, the short current spikes are fed by the capacitors, not by the PSU. For more references, I recommend TI's 'grounding in mixed signal systems' document, or similar documents from other manufacturers/experts. Hence in practice it is usually NOT a good idea to split ground planes. Rather, be strict in portioning your systems, and apply good decoupling. Also allow for distance between analog and digital sections. If properly designed you don't need a split plane, and it can easily give a lot more trouble than it might solve.

[@kensmith5694]

A few more: -- If a trace is not an antenna and is carrying any sort of signal, never take that line off the ground plane it is over and certainly not take it to another ground domain by going through PCB with no ground layer. Doing this will cause you to radiate RF. -- If you are doing a DC-DC converter, it is common for the engineer to note either on the schematic or in a README.TXT which connections carry the large currents to ground. As much as possible, these points should be connected together by a copper pour in as small of an area as can be managed. This can mean doing a lot of component rotation and moving. -- If the circuit is dealing with very small signals, it is common for the engineer to specify that certain ground vias can't be shared and that other ones must be shared between two parts. A via is a little R-L circuit and can couple signals between sections and the ground plane is only nearly at the same voltage everywhere. Differential signals are done to reject issues but you can bring them back into the circuit with a misplaced via. -- If a current sensing resistor is noted as needed "Kelvin connections" look closely to see that the layout did this. -- If there is a note about clearances for voltages, check that they are obeyed. Some circuit produce high voltages. -- If the board has to mechanically fit somewhere see that it will.

[@SIM31r]

1) kzbin.infoySuUZEjARPY?si=pKa3AxAfHpoFaVXZ

[@Berk-lf6ge]

Thank you so much. Im doing my bachelor thesis and i have to do pcb design a lot. These Tipps are fantastic and explained efficiently and clearly!

[@PredictableDesigns]

Glad it was helpful!l

[@jeremiahvandagrift5401]

This is actually so nice, to many common mistake videos are honestly something useless and don't pertain to people that already have the bare minimum knowledge. Will definitely reference this in the future as I learn :) Also, when you mentioned placing inductors perpendicular to each other my first thought was of accidentally making a Halbach array and making the problem even worse lmao.

[@msimon6808]

Always make sure the area on the top equals the area on the bottom. A mismatch can cause serious problems.

[@adamnowak8876]

What problems?

[@MrMuggemann]

@@adamnowak8876 The PCB will warp during reflow or wave soldering because the different layers will expand at different rates. The larger the PCB and the bigger the difference in copper the more it will bend. This can also lead to fractures in the copper traces. Also it makes fixturing the PCB for later manufacturing steps difficult. Its not a big problem if you're just hand soldering a single prototype, but can become a real problem when you want to get your PCB manufactured in bigger numbers. Another problem can happen during the etching of the PCB. Removing more copper needs more time. When one side is done etching there might still be a lot of copper on the other side that needs to be removed. And by the time all the unwanted copper is finally dissolved the acid might have already attacked the traces on the other side, or worse thin traces can already be completely gone. This can be a problem even if you're etching single PCBs at home, that's how i learned about it.... Also its just a waste to remove too much copper.

[@adamnowak8876]

@@MrMuggemann If you ware reflowing PCB back in 90's warping due to copper inbalance was the case. Nobody cares about it any more. Nor for 2L neither for 4L and more. And I am talking both small and big PCBs. By big I mean PCBs in size of A4 paper as most streamline paste printer or P&P machine would have work area not bigger than this. Same for the overetching. All is needed is to avoid acid traps. SImple as that. In many years of my experience (like 10+yr) I have never encountered an issue with things mentioned (That includes having multiple SMT/THT assembly lines in house as well as NPI). But that requires certain knowledge that would be deeper than sticking to poor PCB manufacturers DFM. Maye it is time to change PCB manufacturer. Not to mention that even if you order any and I mean any PCB (in JLCPCB for instance) they will manage to do the PCB no problem. It is matter of tehnology used in the earehouse. Still I have no idea how are they able to produce and assemble PCBAs that cheap yet maitian multilyer PCB, burried vias, tracks as thin as 0,1m ad so on. For that kind of PCB manufacturer I never encauntered issues also.

[@MrMuggemann]

@@adamnowak8876 Yeah i guess you are right. Its not as big a problem as the top comment made it sound. I was speaking mostly from my own hobby experience for the etching (that whole setup was far from optimal), and from working at a company that still manufactures some products in a VERY 90s process. There its only that way because its not really a problem (for that specific product) and neither the customer nor my company wants to spend any money to fix it...

[@adamnowak8876]

@@MrMuggemann The worst part thsat well equipped PCB manufacturers are cheaper than the ones stuck with all machines and technologies :)

[@urmok6iv]

I really appreciate the effort you've put into creating content on PCB design. While watching, I felt that this video was a bit on the general side and contained some outdated myths - something I've often experienced when seeking information (and mostly in official datasheets). However, I understand that catering to a broad audience can sometimes necessitate this approach - it's easy to follow for new PCB designers. I'm always on the lookout for more in-depth material, much like videos from Altium Academy, Rick Hartley, and Eric Bogatin. Their experienced insights often leave me in awe. In future videos, it would be fantastic to see topics like choosing specific components for different circuits or an explanation of component parameters, or about situations where you can't follow all good practices and have to make compromises. Such content could provide valuable, detailed knowledge for other PCB design enthusiasts like me. Looking forward to exploring your other videos and seeing what else I can learn. Thanks for your contribution to the PCB community!

[@jmcgrath777]

Overall, very good info for beginners, but I have to disagree on split ground planes! This is a really old practice and a good designer will almost never split a plane. There's always an exception, but 99% of board reviews I've done with split planes usually do this wrong. If you're hiring a designer that needs to split a ground plane, they usually don't know what they're doing. There are a *ton* of techniques you can use that don't require a split ground and it's always a better practice overall to keep a solid ground plane. If anyone disagrees with this, I would love to hear your thoughts! However, good design principles and a good understanding of coupling, grounding, stackups, transients, etc., will almost always lead to a way around it.

[@josephcorleto1853]

So I have been through several EMC courses and they all explain that the splitting the ground planes is a frowned upon practice for nearly every design. They usually explain that splitting the ground is used for very special circumstances. And when they do see someone splitting grounds, they usually call them prospective customers since the practice usually causes problems in the design. I first heard of someone going against the splitting rule about 12 years ago from a test engineer I used to work with. He told me that he would always talk to the EMC guys at the EMC labs that design engineers didn't seem to understand that it makes the design worse for SI/EMC tests. I shrugged it off since I was a new engineer at the time. Now here I am 12 years later with this test engineer's remark being validated by several EMC evangelists in the USA and the UK, and from the EMC courses I have taken. Not saying your advice is wrong but it seems in modern PCB design layout and at least from an SI/EMC point of view, it is advice of the past and should be avoided in most designs. Just one EE to another sharing knowledge. Without going through a pay-wall, take a look at Rick Hartley's video on the subject here on KZbin. Other than that, I loved the video and keep up the great work!

[@doragasu]

I would advice against splitting ground planes. It can be done if you are very careful, but usually using a single ground plane with proper PCB segmentation (separate digital and analog zones, think how high speed currents will flow on the plane) will yield the same or better results. And you will avoid other terrible mistakes, like traces crossing above split planes, that can completely ruin signal integrity and cause all kind of EMI/EMC problems.

[@patrykx4577]

Pop up in my feed. Great video. I design pcb many years ago in my first job, now im still making electronics as hobby projects. My best solution to avoid problems i to print every layer from gerber on foil, an check using window as backlight. Thanks for sharing :)

[@PredictableDesigns]

Thank you for sharing that!

[@sebastian_harnisch]

Both AD and TI recommend in their application notes to use a solid ground plane and only separate the circuits, obviously not routing any of the digital signals in the analog section and vice versa. I can't see why I should separate those sections* if located properly and distance is big enough. It's not like fast digital return current start flowing in the analog part of the circuit just to take the path of larg(er) impedance?! Also, routing the digital signals to ADCs/DACs and not having a ground plane underneath would be a big no-no. So *at least* this point has to be made very carefully - and I feel more nuanced than in this (admittedly short) video. I'd be really interested in hearing your take on that. * For precision analog circuits I see why having a solid ground plane (only?) might be an issue, regardless of whether there are digital circuits on the same board/connected to the ground plane. And what about circuits with multiple ("precision") ADC/DACs? Star grounding like on the demo boards doesn't work, ground planes might be problematic as well.

[@d614gakadoug9]

The important thing is to be aware of how currents may flow and to _think_ about where they may flow in your actual design. It seems a lot of people believe that if you smack down a ground plane layer the whole thing is zero volts and you can use it with impunity. They seem to be the same people who think you can use a 15 cm ground lead on your 250 MHz oscilloscope probe. What this world needs is a good low cost surface mount zero-volt node. [edit to add:] A lot of digital designs now use point-of-load switchmode regulators, which are usually buck converters. The input current to a buck is chopped. For example a buck delivering 2 volts from 5 volts at one ampere average output will have an input current that swings from zero to probably around 0.8 A in nanoseconds, rises linearly to 1.2 A then drops back to zero in nanoseconds. The duty cycle will be about 40% and the switching frequency up to several hundred kHz. Currents far higher than that are common with big digital ICs these days. You need to be really careful about where those currents are going.

[@sebastian_harnisch]

@@d614gakadoug9 true, but frankly not very helpful. I’m talking about fairly complex circuits here (like a SMU in my case with two four channel converters, and reasonably complex control and measurement circuits) where it is difficult to just „think“ about what is happening and which of two imperfect solutions is the better one. Not like one is bad and the other perfect. No buck converter on the board, linear regulators for the win. I know that you meant it as an example only, but no high frequencies, the inductance of the ground lead likely isn’t a huge problem in that case. Btw: I’d consider this measurement techniques 101. Doing it right, however, can be challenging when you don’t have the luxury to prepare a prototype with many easy-to-access grounds close by.

[@dekutree64]

That last point about 2 layer grounds is very interesting. Here I've been trying to connect all the ground areas to eachother as much as possible so everything can take the shortest path, when it really should be the opposite.

[@keithsummers1889]

Another easy tip would have been to suggest to stay away from cheap components from off-brand companies. Another would be to lean towards ICs that miniaturize your design goals -- such as monolithic synchronous regulators. Another very simple idea is to always over-rate your circuits to be at less than 60% (or less) of maximum loads. Thank you for mentioning 4 layer (or more) boards. I rarely go lower than 4 layer. The value of a 4 layer board far outweighs the marginal cost.

[@PredictableDesigns]

Great tips, thanks!

[@Wingnut353]

As someone that makes small-medium run PCBs for industrial use, monolithic regulators are only an option these days for very small runs, and those I just stuck a linear regulator on it and call it a day. Because my A # 1 priority is to be able to supply these boards when the need arises because efficiency, cost and really anything other that availability are secondary. Since the past 2 years I have adapted though and all my new boards use the same regulator design or a slight variation that I just plop into the design, for the most part I can redesgin the regulator section and update this in all my boards as design requirments and or component availability changes, it also allows testing and validating the design once and resuse multiple times. I used to use the TL783 untill the supply dried up and I had to adapt....

[@keithsummers1889]

@@Wingnut353The main idea of the monolithic synchronous regulators is that they provide the FET switching internally (thereby removing parts from the board). When you reduce parts you shrink down the design and minimize electromagnetics. Efficiency and reliability goes up and waste heat on the board goes down. The cost is higher up-front, but if you keep that board in service for a long time, the final cost is lower. Customers can be funny -- so, if availability is the order of the day, I understand the alternative choices. You would think an industrial customer would be more savvy?

[@solderwickie]

The disadvantage of monolithic regulators is that if you have a issue with them, debugging is extremely hard if not impossible.

[@keithsummers1889]

​@@solderwickie I don't know how this could possibly be true because all the internal parts are designed for you. You only have to supply the correct inductor and capacitors and the circuits just work. In some cases the feedback loop is closed for you by their designs. Now - if you are running into bogus cloned parts, you might run into troubles, but going with high-end parts from reputable companies should prove to be very successful. Monolithic is not always the right choice, but I have enjoyed success with them.

[@nosmo159]

If one has the analog in one section of the board (say one corner or edge) without digital signals or ground returns running through them, than separating the analog ground is unnecessary--at least for boards I've made (which admittedly are not very high speed).

[@PredictableDesigns]

The impact of doing that will just depend on the specifics of the design. If the analog isn't very sensitive, and the digital isn't very high-speed, then it's probably not necessary, but always a good idea to be safe. Thanks for the comment!

[@zyeborm]

That is the currently recommended way of doing it in general especially from an EMI perspective kzbin.info/www/bejne/rHKvpWmJmZ6pors If you have interference concerns then you should solve them explicitly.

[@jenshellwig2574]

A very easy method to avoid these issues is to use slow devices. Nowadays I could get way more power by using ESP32, but I continue using Attiny devices running at puny 8MHz. My boards have all the mentioned design errors, but are working absolutely stable. All my communication is wired, so I also do not have to worry about impedance matching of the antenna. That's the best advice I can give.

[@urmok6iv]

It's not the clock speed that matters. It's the higher harmonics in signals that have a short rise time. You can still get in trouble if you run at 8MHz, but you are switching MOSFETs that have short rise times.

[@Patrik6920]

@@urmok6iv ..i doubt that any problem at 8MHz, just add a lage enugh capacitor to eat any ripple current, for low current i cant see its a problem at all, ..but u are correct in that mosfets can be incorrectly triggered by EM, but 99% will come from ambient EM not the circuit.. ...if it would be a medical application or military it would be a concern.. cant see thats the case here..

[@kensmith5694]

If your PCB is large, you may need to put a resistor in you 8MHz clock line to keep it from radiating harmonics.

[@Patrik6920]

@@kensmith5694 hum..possibly.. ..or just run an inverted clock signal in parallel if possible (takes least space), just an slight chenge in timeing may solve it (capacitor, coil or an resistor), but to cancel it out (for the most part) is good.. also limits emitted EM interference to other devices if thats a problem

[@gayusschwulius8490]

Yep. I think it's generally a bad idea to use overpowered devices. If an ATTiny suffices for the task, why waste an ESP32? It's the basic KISS principle in action.

[@cezarcatalin1406]

I usually have a ground plane and the power lines are shaped like a tree with a big branch splitting into many branches. Of course, having both a VCC plane and a ground plane is better but if we are getting into fancy territory, the TRUE analog sensitive circuits have a ground plane sandwich with an array of vias with V+ and a V- traces running between them and then another ground plane sandwich with the sensitive analog signals running between those planes. Two extra layers handling less sensitive stuff are on top and on the bottom. Of course, that’s already a big fat 8-layer PCB and for most applications should be considered overkill.

[@TheChillieboo]

Thank you so much! This was the perfect video for where I’m at on my product design journey.

[@PredictableDesigns]

You're so welcome!

[@hanelyp1]

Section 1, to avoid a trace being an antenna keep it SHORT, and the area between trace and current return small. Using a good ground plane tends to work well on the second point. A wider trace is less a problem unless Pico Farad capacitance is an issue.

[@dave_dennis]

Controlled impedances are usually not necessary when the length of the trace is

[@jlinkels]

On the common ground return line (the last point you touch) I think the inductance of the copper trace is of equally or more importance than the ohmic resistance. Hence the recommendation to fill all empty space on a 2-layer board with ground conductor. Although basically you still should route each component to the ground connector separately and widen or fill the traces.

[@StrixTechnica]

Good video, and these are all generally rules I apply in my designs. There are some things worth clarifying. 1:12 With a few exceptions, 90° bends are seldom the problem they are said to be (c.f. Dr Howard Johnson¹) and don't cause the manufacturing problems they once might have. They do represent a small impedance discontinuity and, at microwave, form a capacitive parasitic like a bowtie low-pass filter. Those might degrade SI, but the tendency to radiate has more to do with E-field coupling to a trace's reference plane and H-field coupling to the return current within it, both of which depend on the geometry of the whole trace, not just its corners. C.f. why coax fully contains both E- and especially H- fields, and why common-mode currents radiate in a way that differential-mode currents don't. It isn't the shield that stops the H-field, but rather the equal and opposite H-field of the return current that does - and any current imbalance constitutes common-mode current, which will radiate. High frequency return currents tend to follow the path (about 3x signal trace width) in the ground plane underneath the signal trace because inductive impedance is a function of loop area. Ground plane slots force the return current to deviate from the signal trace path, which increases loop area which weakens H-field coupling which promotes radiation. Both of these, along with cross-talk, relate to the fact that energy flows in the dielectric between conductors, not in the conductors themselves. When fields from signals intersect in the dielectric, they couple. Same with power supply noise. Running signals between the supply planes they're referenced to couples noise from one into the other. Another thing that promotes radiation is poor delay matching in differential pairs². These depend on wavefronts travelling together along the length of the transmission line arriving at the terminator at the same time. If they don't, the energy has nowhere to go other than to radiate. Note I said delay matching rather than length matching: all things being equal, these ought to be the same. In practice, the variable Dk of high-resin prepregs depending on whether a trace has resin or fibre underneath it can lead to different delays even though the lengths are the same (because velocity factor = 1/√Dk). In tightly-coupled differential pairs (c.f odd-mode vs coupling impedance), wavefronts need to be paired along the length of the TL as well, which is why any length compensation meanders should be done as close to where the length mismatch was introduced. Nevertheless, I still avoid 90° bends, if only for aesthetic reasons. 2:52 Understanding the role of parasitic inductance is crucial to understanding why decoupling caps are needed, how they work, and how not to apply them. Decoupling caps compensate for supply inductance. Bulk caps can supply large current transients but only work at low frequencies because they have larger intrinsic inductance of their own. Smaller value caps have less intrinsic inductance so can support higher frequency transients, but can't cope with large currents. In both cases, that intrinsic inductance can be made worse by poor via placement and it produces a point of self-resonance, where they cease to be useful as decoupling. To deal with this, sometimes you see multiple values in parallel, which combine to form anti-resonance peaks which degrade the usefulness of them all. The effect of small decouplers begins to degrade from about 100 MHz, and is all but gone by 500 MHz or less³. Beyond that, the capacitive coupling (small as it is) between plane layers provide the least-inductive reservoir of current, therefore they should be placed as close to one another as possible to maximise coupling (as well as to avoid coupling noise). 9:26 As noted by several others, split ground planes usually do more harm than good unless the designer understands how to mitigate the effect on return current paths. For example, if AGND and DGND are split, joined only at the power supply, then return currents between the two can make noise coupling worse by enlarging the inductive loop area - especially if doing so increases noise crosstalk between analogue and digital power supplies because they're run parallel to one another. If in doubt, don't do it. Usually, spacial separation is enough because of that inductance. There are times when it is necessary, but it should never be done blindly and as a matter of course. 10:10 Copper does have parasitic resistance, but that's not nearly so troublesome as parasitic inductance of power traces. For example, a 100mm x 1mm trace in 1 oz. copper has a resistance of about 50mΩ and a self-inductance of 115nH, the impedance of which equals its resistance at just 2.7MHz, above which inductive impedance dominates. ¹ www.sigcon.com/Pubs/edn/bigbadbend.htm ² kzbin.info/www/bejne/h3iTcqOloZKioJI ³ kzbin.info/www/bejne/r4TYho17n6aFhrs

[@andydelle4509]

I have seen some boards from highly respected manufactures that have no decoupling capacitors at the chip pins. And these were big boards, about 14in x 20in full of TTL chips. And the average clock frequency was 27mhz. But they did have a solid power layer and ground layer. I guess those layers were low enough in impedance to where no decoupling caps were needed. I was surprised too but it did work fine. Note this product has a 5v, 200amp power supply for the TTL logic chips. * The company was Ampex. A former highly respected broadcast video / audio and military product manufacture.

[@michawisniewski4654]

some manufacturers use high epsilon prepregs to act as distributed capacitance. Of course in multilayer board if you have power plane between two ground planes that is also inherited. In high speed applications actual impedance of vias will kill any ESR of your capacitors, so unless you are able to put decoupling caps on the same side as your IC - you are in trouble. Fortunately, 4 and 6 layers PCBs are quite cheap these days and with 6 layers you may get covered vias for no additional cost - that is really nice when you have high density BGA/CSP and via in pad is unavoidable

[@andydelle4509]

@@michawisniewski4654 It probably did have a second ground layer and it had at least 8 layers. This was a 1980 designed product. I don't remember but I think it was a CAD layout although they were still using tape layout on some other less complex products.

[@jpt3640]

Nice. I am currently learning pcb Design. I did not understand your last point. Couod you elaborate? I was told to put ground on every empty space on both layers and add as much vias as possible between them

[@davidb3925]

I fall into the novice/enthusiast category and I deal with a mix of analog circuits and digital. A watched a video on altiums channel a while back where if you have signals above 100kHz the ground signal return will try and return as close to the signal trace as possible. If you have a ground plane on a 2 layer board that ground plane is 1.6mm from the signal trace. Any other trace closer to than 1.6mm to the signal trace will instead carry the ground return for that signal. I redesigned to put explicit ground traces on the same layer either side of and as close to my important analog signal traces. The noise reduction in the signals was amazing.

[@unwatchable.]

first 5 are best advices and last one is horrible advice. Never ever split pcb between analog and digital ground. keep common ground but keep circuits at fair distance. You will be saved. Practical experience.

[@stinchjack]

My PCB design mistakes tend to be much grosser than there. Wrong footprtints, missing power connections, wrong schematic, and wrongly placed connectors!

[@A_RosnerNZ]

Phew! My boards don't have these errors. Thanks for the handy quick reference list :)

[@bobingabout]

I've made PCBs and forgot decoupling capacitors before... it didn't work... It was too late to add one per chip, because there were about 40 chips on there, so I just added one bulk near the input of the board, and a few noise caps around the board, it did a good enough job to make the board work. I definitely always try and add a 100nF capacitor per chip on future designs.

[@adamnowak8876]

That means your whole board was DC signal one. By DC I mean anything less than 100MHz :)

[@bobingabout]

@@adamnowak8876 I'd disagree that anything under 100MHz is DC. I mean, back then, my Oscilloscope only went up to 10MHz. The good scope was only 20MHz. The "Processor" was a PIC16F877 running on a 3.2768MHz Crystal, which means the fastest signal possible down the data wires would have been less than 1MHz. So, if you contrast that to more modern equipment that runs in the GHz range, yes, the signal frequency was rather slow. The board in question (the one where I forgot the capacitors) basically had 12 PALCE16V8 chips on it, and some other logic chips, and was a custom address decoder board, converting 4 pins on the PIC to a 24 bit data bus. It included custom commands, like increment address and decrement address, as well as being able to serially feed an address into it. As you can imagine, other connected boards included RAM and EEPROM chips. The master board also had a data bus splitter, that connected to a parallel port, for receiving data from a PC. Yes, that's how long ago I worked on this project, Parallel port was the best option, because USB DIY projects weren't really a viable option back then.

[@VulpeculaJoy]

One of the most annoying problems can arise from incorrect component footprints. You always want to double check a) that you selected the correct component, especially if there are multiple variants, b) that the footprint you created / downloaded from the manufacturer is correct, if you had to add the component to your library and c) that the component is placed on the board as intended (and not flipped / mirrored, or not connected correctly).

[@jlinkels]

Great video. Everything you say is true and technically sound. However I am afraid it is quite hard to squeeze all the required knowledge plus at least 2 years of experience in a 10 minutes video. But you cover a good part of it.

[@JesusNowEschatology]

Hey, I just wanted to say thank you for this extremely helpful video. I'm just getting started, and this was an appropriately technical, yet quite accessible overview. THANK YOU!!

[@PredictableDesigns]

Glad I could help! Thank you for commenting.

[@HelloKittyFanMan]

Wow, this is so much to keep track of that it kind of makes my head spin! Thanks for the video.

[@kensmith5694]

Check lists can help

[@HelloKittyFanMan]

@@kensmith5694: Yep.

[@nicktheboatman4888]

Thanks for this informative guide. Ref ground planes and bus bars: please dont forget (and feel free to comment on) use of prototype Eurocards which have pre-defined bus bars. Mind you these were for DIP-n packages (showing my age) but nonetheless are for ground busses.

[@rrhodes222]

I remember those! They are a wiring convenience in lieu of a ground plane to be sure. Still, they don’t do much for impedances of high frequency- content signals / reflections.

[@multiplysixbynine]

Good talk but it would benefit from presenting visual examples that actually correspond to what is being discussed rather than generic stock images. For example, in the section about grounds in two layer boards, I was confused that the PCB image didn’t actually show anything to do with problem or its solution.

[@mobbat42]

It was traditionally believed that sharp corners could cause signal reflection and impedance changes, potentially leading to signal integrity issues. However, with modern PCB design and manufacturing techniques, the impact of sharp corners on signal integrity is generally negligible for most standard applications. So don't worry about 90° turns of your traces. It's a non-issue.

[@kensmith5694]

Also back in the day of the dinosaurs the right angle corners would peal up.

[@mitchhilger5394]

In through hole days, and wave soldering a 90 degree could break because of heat expansion, so they were to be avoided for this reason also.

[@mcmurtr79]

Its funny how 90 degree bends are bad for high speed except for the microwave guys using them in all the embedded filters oh and they are magically ok for antennas operating at 2ghz or higher. Please present some data like a simulation or better yet a test board and a tdr measurement if this is such a problem...

[@Rokreder]

​@@mcmurtr79 having your antenna radiate is kinda the point...

[@matthollandsf]

it has nothing to do with manufacturing techniques, it's pure geometry. any corner where the width changes will cause a signal reflection/impedance change. 90 degree turns introduce a larger width change at the turn than 45 degree turns. arc turns have no width change. of course how much these small impedance changes affect you really depends on the application.

[@calex007]

Apple Computer’s MacBook designers should definitely watch this video ☝🏼

[@adamnowak8876]

Splitting digital and analogue gnd planes is a myth. Or at least term too general. Especially for boards with layer count higher than 2 :)

[@kensmith5694]

I am designing a circuit with a 100nV signal in one part and a 50V squarewave in another. I am not splitting the ground. I will be grounding a lot of unused area.

[@adamnowak8876]

@@kensmith5694 nV? :)

[@jlinkels]

I would call those points you discuss not exactly mistakes, but a lack of skills, experience, workmanship and relying too much on automated routing and placing. Great to point those out though.

[@NullStaticVoid]

I'm just a hobbyist, but I've been building and repairing stuff for 30+ years. I've had some arguments online about ground plane stuff. Stating as you did here that ground is not magic. That 0v ref can get pushed around by various current and voltage shunts. Like the prof in the one college level electronics class said. Ground is the sewer, don't count on it for clean water. But some folks really think as soon as you get to ground everything is solved. Not just amateurs either. Quite a lot of pro level analogue gear has ground problems that are solved with internal star grounds, which is tedious. Some of those also have the wrong pin hot on the outputs.

[@pepe6666]

hey man this is a really great video. i just got started with kicad for the first time and youtube brought me here. i'm getting a lot of value out of this video. i'm gonna hit that subscribe button so freaking hard. thanks for your work

[@PredictableDesigns]

That's so great to hear!!

[@bricefleckenstein9666]

Worst PCB problem I've ever seen was in an intermediate IF stage on a Mil-Spec reciever. adjacent stages had the emitter bypass "chip" caps in 2 adjacent stages placed so close that the position of the chip on their pad affected the bandwidth of the stages and would sometimes put them out of spec. I was working as a production line tech at the time, and I'm the one that figured out WHY we were having so much variation in bandwidth on these stages (and was pretty close on what I guessed the "between the 2 adjacent cap" value of capacitance was). Board had to be completely redesigned - but the new design worked correctly.

[@tcarney57]

An additional reason for matching feedline and antenna impedances is to minimize reflections that can degrade IP3 and other other RF parameters. Additionally, lines going to and from RF mixers must be matched to keep reflected signals from remixing and producing unpredictable spurs, etc. The need to minimize reflections from discontinuous impedances is much more important than the need to maximize power transfer. You might, after all, have power "to burn" and therefore not worry about transfer efficiency. You need to worry _more_ about reflections.

[@PredictableDesigns]

Great points! Thank you for explaining.

[@tomislavgasparic8100]

Great, short and clear explanation. ❤❤❤

[@Beredro]

Weird order of the mistakes... Why talk about RF integrity and Antenna design before the more basic stuff in the end?

[@PredictableDesigns]

I guess because those are a bit more interesting for many than just the basic mistakes:)

[@ElrondMcBong.]

Great Video, thank you very much! I designed a PCB with an RC-Filter, a Schmitt Trigger IC and a JK Flipflop IC in series, would I still need decoupling capacitors for those ICs? Because the circuit has such a high noise tolerance since it's so simple.

[@StrixTechnica]

As a rule of thumb, yes, always use decoupling caps. They cost next to nothing and can save you a lot of grief later. Also, it's not the system frequency that matters so much as edge risetime. Fast logic families can still suffer switching noise problems even at low clock frequencies.

[@joymakerRC]

thanks , now i will have to watch all of your videos. needed this

[@LittleRainGames]

Robert frank or what ever his name is had a guest on a while ago, and if I remember correctly, the tests he did showed that multiple sized decoupling caps performed worse than a single 10uf cap. He was saying just put as big a cap as possible up until 10uf or something like that.

[@fano72]

The core knowledge is that any wire - even on a pcb - has a resistance, a capacity and an induction.

[@PredictableDesigns]

Yes, resistance, capacitance, and inductance.

[@matthollandsf]

decoupling capacitors are for providing a low inductance power source for high frequency currents (such as the switching of a transistor) they are not for filtering noise (although they could help with this as a byproduct). most people get this wrong. (as a thought experiment ask your self If your IC would still need a decoupling cap if it and its power supply (lets use an LDO) was the only thing on the board and electrically and magnetically isolated from the outside world)

[@flisboac]

Everything made sense to me, except the Ground Plane Design tips. More specifically, the return paths part.

[@bjtaudio]

These are basic pcb layout rules, Ive seen lots of mistakes too, its more a case of lack of understanding of how electronic components work and interact. One big problem I often seen is poor creep-age clearances between mains and SELV supply found in consumer products from China.

[@jaytaffer9641]

I think you have decoupling capacitors confused with bypass capacitors. Decoupling capacitors block (decouple) DC signals from one stage to another stage of an analog circuit. Great video though!

[@brandyngabel5148]

Thank you for this clear, informative video with no bs

[@PredictableDesigns]

Thank you for commenting!

[@Nedski42YT]

I've dealt with some circuit design engineers who were too lazy to add the decoupling capacitors to the schematic. Then they told the engineering manager that they had FINISHED the schematic! They expected me to do it for them. I told the engineer that he would have to APPROVE everything I had added to the schematic. He put them on after that.

[@kensmith5694]

I often put a group of capacitors on my schematic with a note to spread them around on the solder side. This gets the 10uF guys spread out.

[@MicroageHD]

What is considered high speed frequencies? Is there a rule of thumb when to seriously consider delay lines (kHz, Mhz, GHz)? Or do you have to calculate it yourself every time?

[@emielv7677]

How can you join lets say an analog and digital ground plane together properly? I've seen people do it all sorts of ways. At one point, with a capacitor, with a resistor or with a ferrite bead. Which one is the "best" or which one works better in what situation?

[@msimon6808]

How much coupling do you want between the two grounds? How much voltage variation between the two grounds is acceptable? Do you need AC coupling? DC coupling? Both? What frequency?

[@emielv7677]

@msimon6808 good question. I never considered that. I don't really know. All my designs have been DC so far.

[@KissAnalog]

Use a zero ohm resistor near where the signals meet. If the digital and analog sections don’t share a signal like a bus or anything - then they don’t need to be coupled. A capacitor can then be used just to keep them near the same potential.

[@horacioventurino7497]

Very interesting. Thank you very much.

[@PredictableDesigns]

You are very welcome! Thanks for commenting!

[@davidfalconer8913]

A handy tip for folk that have to fault find or rework is to make this easy ! .... ALL components that have leads or any through hole contact should have their holes large enough , so that before soldering , with the board turned upside down , THEY ALL FALL OUT , this makes desoldering easy .... TOO MANY designers make holes the exact size so the component is an interference fit , resulting in the through plating being ripped out and ruining the PCB ... also any through holes that connect to a ( copper pour ) ground plane should have a spider connection to stop heat from any soldering iron dissipating rapidly into the ground plane .... ( tried - n - tested ) ...... NOKIA™ design dept ...... DAVE™ 🛑

[@PredictableDesigns]

Thank you for sharing that tip!

[@Jürgen-u5o]

The vast majority of the pictures you show have nothing to do with the subject matter you are talking about. They don't help understanding in any way, they don't even illustrate the subject matter -- they just create distraction and confusion. Please don't do that. Leave out all illustrations which are just "colourful pictures". Go to the effort of finding or creating some diagrams or photos which actually visualize the things you are talking about.

[@PredictableDesigns]

I appreciate the feedback. I do have lots of videos like that, where I actually design various PCBs. But some videos I like to spice up a bit with more visuals. This is my most popular video so some people must like this style:) Thanks for commenting.

[@Atetus94]

Very simple and informative video! Thank You very much :)

[@PredictableDesigns]

Glad it was helpful!

[@whoanelly737-8]

Dang! I guess I’ve been doing it right! Nice content.

[@AmstradExin]

Not sure if I have ever seen mixed signals side by side. Usually that is the primary focus, working on such a board. But incorrect decoupling is so common, even big companies do that.

[@TheChalansillo]

thanks for the video, I need more information about the last point about the ground and power planes, could you recommend any resource? I kind of not getting your explanation, I am new.

[@Scrogan]

Traces connecting inductors shouldn’t be wider than necessary? Don’t you mean longer than necessary? In the current loop of a switching converter I’d want to make the traces connecting to the inductor as thick and as short as possible, to minimise ESR for the short current spikes. If emitted EMI is an issue, then use more ground planes and vias. Also decoupling capacitors should be placed to minimise their impedance to the power pin AND the ground pin. There are some situations (especially with low layer counts) where you’re better off putting a cap further from a power pin if it means significantly reducing a snaky ground path. Those guys that design complicated single-sided boards (e.g. television power board) must be pretty clever.

[@rrhodes222]

Two great observations - the inductor width vs length issue, and the fact that decoupling caps form a loop… and inductive loop with their load, such that it’s both connections (v+ and return) [specifically, the cross sectional loop area] that matters.

[@GregoryAlbright-t3p]

Noob question... Im sorry I have no basis for this question. Is there a way to noise cancel on a PCB the way we do with twisted pair wire?

[@PredictableDesigns]

Yes, they are called a differential pair which are two traces routed beside each other like a twisted pair.

[@kensmith5694]

Diff pairs and striplines are worth a look.

[@sanjaybatra6593]

Sir I have designed a big PCB based on atmega2560 in ALTIUM. Almost all pins have been used. Board has been tested well, its work fine. Can you review my board ? The purpose is to get your valuable suggestions and improve my skills for PCB designing.

[@PredictableDesigns]

I do offer formal design reviews but a cheaper way to get feedback is inside my Hardware Academy. You can share your design there for lots of feedback. Thanks for asking.

[@sanjaybatra6593]

@@PredictableDesigns sir, its all paid.

[@b6234]

NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD NERD , very nice video. I had a PCB design course and if I was still in touch with them I would definatly suggest this video.

[@PredictableDesigns]

A nerd I am:)

[@Sgyozo]

Another one is not reading the f. manual. :D I did it too, used a new (to me) smps IC, and it was very unstable. Read the docs then, and realized that one of the traces were too long, so i had to bridge them with a wire, luckily it was only a few prototype boards.

[@nicholaslenzini1759]

The stock footage here is phenominal XD

[@sjoervanderploeg4340]

Decoupling capacitors are used to reduce inductance, as to decouple from it! This is what causes the transient power spikes!

[@MrPDawes]

Reference creepage and clearances parameters based on voltage which is a European directive and is part of Low Voltage Directive. This defines distances conductors and traces can be together depending on whether it is Mains and extra low voltage (

[@TecSanento]

If you need those Power capacitors for any Chip why dont they included in the silicone already

[@PredictableDesigns]

Because capacitors built on silicon have very low capacitance and even nanofarad values are huge in size and take up most of the chip.

[@rich1051414]

You state that 'metallic objects near inductors' is a sign of poor PCB design, but would this include heatsinks? I never considered that adding a heatsink to hot inductors would effect their inductance. Is this usually a non-issue, or should I consider some consequences before adding them to inductors that didn't originally have a heatsink.

[@WorkinDuck]

As always, it depends. Most inductors these days, especially SMT ones, are shielded, so their radiated magnetic fields are negligible.

[@AstrosElectronicsLab]

New sub. Please demonstrate with KiCAD these mistakes so people like me don't make them?

[@chargen7224]

just awesome, mister great insights shared thank you

[@PredictableDesigns]

Glad you enjoyed it!

[@tempvoid7680]

Great reading, thanks

[@fjrg76]

Hi, you've got a new suscriber!

[@PredictableDesigns]

Awesome! Welcome!

[@Renville80]

It would be nice to know what is considered ’high speed’ as a set of pc boards I laid out never worked properly… the boards had a 1MHz system clock.

[@kensmith5694]

How exact did the clock skew have t be? "high speed" is anything where a timing number won't let light go about 10 times the size of the circuit.

[@rrhodes222]

Keep in mind, unless your clock is a pure sine wave, it’s not the fundamental that matters (i.e., 1MHz in your example), but the spectral content of the edge rate of the “square” wave that matters. That’s always larger than the fundamental, and determines the spectral content of what makes it to the load and what gets reflected back to the source. To make it all simple, just terminate high speed signals properly and use a matching signal line impedance and all will be right with the world.

[@1337GameDev]

5:30 - I understand the need for impedance to not be HIGHER on the load side of an antenna (to avoid signal reflection), but what if it's lower? Is that an issue?

[@PredictableDesigns]

For maximum power transfer the two impedances must match.

[@1337GameDev]

@@PredictableDesigns I understand that rule -- but why does LOWER impedance cause less power transfer?

[@andrewdeweerd461]

@@1337GameDev A long time ago, engineers arbitrarily chose a standard source (driving) impedance of 50 ohms. So let's accept that doesn't change. Also, let's note that power = wattage = I^2*R. If your antenna impedance R is less than 50 ohms, the power across it will go DOWN (and power dissipated in the transmitter will go up - that's how voltage dividers work. If your antenna impedance is greater than 50 ohms, the power across it will also go DOWN because the higher impedance reduces the overall current from the transmitter. Do yourself a favor and make a little excel spreadsheet and prove it to yourself.

[@yeaveny3629]

9:16 - whole section about ground planes and pcb stack-up is misleading and simply wrong wrong. Splitting ground planes is almost never a good choice.

[@chromosundrift]

Talking about "delay lines" you mention "high frequency". What qualifies as high frequency?

[@kensmith5694]

Take the size of the PCB area in question. If the dimensions are more than 0.1 of a wavelength at the highest frequency involved, call it high frequencies. For a sqarewave or logic signal, assume the highest frequency is about the 7th harmonic.

[@chromosundrift]

@@kensmith5694 wow thanks

[@technicalraja-ld2mp]

Super sir ji