Running Zephyr RTOS on Cadence® Tensilica® HiFi 4 DSP - Iuliana Prodan, NXP

Running Zephyr RTOS on Cadence® Tensilica® HiFi 4 DSP - Iuliana Prodan, NXP
Running Zephyr on Arm® Cortex®- A or Cortex®-M cores is widely discussed and there are many examples on how to implement it. However, many Cortex®-based MCUs and MPUs are choosing to also incorporate on-chip DSPs to offload computationally-intensive tasks. The Cadence Tensilica HiFi 4 DSP is one such example of a high-performance embedded digital signal processor (DSP) optimized for audio, voice or neural network processing. This presentation will highlight how to harness the power processing of the DSP by running Zephyr RTOS on the DSP, while running Linux® OS on the main Cortex®-A core. This presentation will cover simple and more complex examples, such as “hello_world”, IPC samples and Sound Open Firmware. Attendees will learn how to launch the application on the HiFi4 DSP, how the HiFi4 DSP and main core communicate together, how to get the output of the application and how to debug. For all the examples, existing drivers and/or frameworks from Linux® OS and Zephyr RTOS will be used. This presentation will go into detail about changes that can be made in Linux® OS and Zephyr RTOS code so that both operating systems can be jointly used across various applications.