SERDES 2 LVDS vs True Differential

SERDES video 2 LVDS vs True Differential

[@OhadHarel11]

One of the most important video I've seen Thanks

[@yuwuxiong1165]

The revision 10 of the article was finished on sep. 9 2008, titled "A treatment of differential signaling and its design requirements", by Lee W. Ritchey. The introduction part of the article is as follows: Introduction Differential signaling has evolved into the signaling protocol of choice for nearly all emerging designs. Over the years I have written articles covering specific questions on the subject and have devoted chapters to it in both Volumes 1 and 2 of my book series, “Right The First Time, A Practical Handbook on High Speed PCB and System Design” as well as articles in our newsletters. Along with all of this, there has been a flood of misinformation as well as accurate information in magazine articles, applications notes and design guides. Some of this misinformation makes PCB layout more complex than it needs to be and some of it actually introduces potential malfunctions. In order to help make the design task a little easier and sort through the misinformation, I decided it would be a good idea to pull all of this information together in a single place so this document is devoted to this topic in the hope that it will make it easier for engineers to get up to speed on this subject. Throughout this document I will use actual test data to determine where the limits are. At the end, there will be a list of design rules that apply to all differential pairs along with a list of rules that should not be used as a starting point for creating a full rule set for a PCB or system. This discussion focuses on differential pairs that are routed over planes as is common in PCBs. Differential pairs that travel on wires, such as UTP, are treated in the afore-mentioned books.

[@suranjukp3044]

Thanks Terry Fox.

[@shubhangigurudiwan1753]

Much valuable information. I have one question. When we talk about a true differential signal pair, does it necessarily has to be transformer isolation, or does any of the other galvanic isolation (eg. capacitor isolation) would also suffice?

[@tfoxwa]

If you can produce a capacitor configuration that will create two EQUAL and OPPOSITE signals (ie equal in amplitude and phase), you have solved the first half of the problem. The second half of the problem is producing a capacitor configuration that will be immune to common mode signals while also combining the differential signal into a single ended signal on the receive end. If you can produce such a thing, I for one will will be mightily impressed for your accomplishment. Always think out of the box. You may be the one to think of something others have missed.

[@shubhangigurudiwan1753]

@@tfoxwa Thank you so much.

[@pigrew]

As predicted, this video has upset me... The argument that the signals can be split into two single ended t-lines doesn't mean that it isn't differential. One can split the Ethernet pairs, etc, and the system will work and be matched. That LVDS can be split into two parts, doesn't imply it isn't differential. Furthermore, the AC currents on the two conductors are equal and opposite. It isn't isolated and there is a DC voltage, but these shouldn't preclude it from being considered differential. The equal and opposite current has great benefits for EMI and CMRR, but only when the two conductors are tightly coupled.

[@tfoxwa]

An Ethernet type differential signal with a transformer is fundamentally different that LVDS. The 10BaseT signals are coupled to each other and are relatively impervious to changes in their surroundings. LVDS is really two single ended signals that compliment each other. They do not work the same way. They are primarily coupled to their return current plane...generally a Ground plane. Things that will work without adjunct harm on a transformer coupled connection will not necessarily work with the LVDS complimentary single ended version. The statement the "The equal and opposite current has great benefits for EMI and CMRR, but only when the two conductors are tightly coupled." is technically true, but it has a very small effect on either EMI or Common Mode Noise Rejection as long as the LVDS type signals are routed over a proper ground plane. The place where this difference becomes critical is high speed SERDES when you are nearing the end of your attenuation budget. At that point tight coupling can significantly diminish the eye. The same is true if you neglect the return current path through a via. That generally results in a phase hit which can be very problematic with the phase lock loop in the receiver. Don't optimize an insignificant problem by causing an even greater problem. In all cases you need to deal with reality. Either get a simulator or build some test circuits and prove it to yourself. This distinction draws real fireworks.....which is exactly why I put it in the training class. TFox

[@neozhang5653]

Wow, so when you layout a not true differential pairs, you do not have to always put them close to each other? Just need to maintain a perfect GND ? And the single end impedance of the differential pair (for example 50ohm) is much more important than the diff-impedance (100ohm)? for example, if there is very limited space on the PCB, I should maintain 50ohm single trace and let diff-pair impedance go to 85ohm instead of keep 60ohm single end trace and 100ohm diff-pairs. is it correct?

[@terryfox6236]

You conclusions are correct. If the lines are too close...ie 85 vs 100 diff, you will have more loss. This will only be important if you are in an extreme situation where you are hard up against your loss margin limits. Higher speed, longer lines, and lossy material all combine to make things like spacing more critical. If you are still a little fuzzy, watch the video again and do a google search on Lee Ritche's article from the 90's. I think he was still at 3Com when he wrote it.

[@neozhang5653]

Thank you Terry!

[@zanekaminski]

​ @Terry Fox Not sure if this is what you meant about the loss of 85 vs 100 ohm differential impedance, but if you are not targeting a particular differential impedance, just a single-ended impedance, routing the differential pair far apart forces you to increase the trace width to get the same impedance. Thus the loss is lower. @ Neo Zhang For me, the key to understanding this is the observation that there is a Miller effect phenomenon going on when the "differential pair" (or complementary single-ended pair as Terry call it) is tightly-coupled. The apparent capacitance between the + and - lines is magnified by 2x because they are always moving opposite each other with a gain of -1. So the broadside coupling between the traces contributes twice as much capacitance per length compared to putting a constant reference (e.g. ground) next to the trace. Eliminating the coupling between the pair means you have to add more capacitance to ground to make up for the missing (mutual, Miller) capacitance. So you increase the trace width and the loss goes down too. You don't need to target 60 ohm single-ended impedance instead of 50 to benefit from the effect either. With the same stripline/microstrip geometry, a coupled differential pair will always be skinner than the uncoupled pair of the same single-ended impedance. So you can maintain 50 or 75 ohms or whatever you like, choosing coupled or uncoupled pairs to either minimize routing space or loss, respectively.

[@mustapha1284]

servis menu board vs.t596_v2.2.5