Seven Segment Display Verilog Case Statements

Write a Verilog module using case statements to enable a seven segment display. Converts 4 bit inputs to hex digits 0 - F.
Add an enable signal to turn the display on or off.
Program and test on an Altera DE2 board.

[@obe726]

Thank you soo much your tutorials are verry helpful.

[@digitallogicdesign3593]

Glad to hear that!

[@smokerji9768]

thank you its very helpfull

[@metennisman22]

i am using nexys 4 ddr. i need to use adders, subtractors, multiplyers, and shift a. how do you use 1st 4 switches?

[@alau87]

Thank you ^^

[@amishah2980]

Where is the first part? I can't find the video

[@rafiqueh3184]

Do u have the constraint file

[@sonyericable]

hi,,,can u show pin assignment of 7 segment??

[@rafiqueh3184]

Did u get the pin assignment

[@metennisman22]

i can send u constraint

[@rafiqueh3184]

Did u get the constraint file