SVA(System Verilog Assertions) Series highlights SVA VIDEO #01

[@jkbzz]

thank you for this series. so grateful.

[@saranyas6503]

Thank you for this series .

[@MunsifMAhmad]

Thanks, I plan to cover the remaining topics in the series next month.. 😊

[@Nipulpatel143_all]

Helpful😊

[@Ananthal-s8o]

Please try to complete assertion series

[@MunsifMAhmad]

Soon will upload more videos.

[@pradhanimasali1001]

How to check period using assertion?

[@vikaspanchal6628]

can you share the notes as well

[@kumarp1767]

Sir am a assistant professor with 13 years of experience. And doing DV course to move to industry. Do I have bright future in the field of dv?

[@MunsifMAhmad]

Yes, there is bright future in this field.. 😊