U3 L5.5 | 4 bit asynchronous Up/Down counter | 4-bit Up/Down ripple counter using T flip flop |

#digitalsystemdesign
#counter
#digitalelectronics
#dsd
design mod 16 ripple Up/Down counter using t flip flop
Mod 16 asynchronous counter

[@user-bj2ue3ml1n]

there is a problem when i click on input for up or down the value changed randomly

[@shaileshpaudel1816]

Mam, QD,QC,QB,QS toh down complement se and hota hey na and QD',QC',QB',QA' up se And hoga na??

[@mahafuzhasan6108]

Mam,,I am not cleared about it’s Timing diagram.

[@Opto30]

Mam if I design with JK FF , so J&K both input is connect with + VCC ?

[@TechnoTutorials2783]

Yes

[@Opto30]

@@TechnoTutorials2783 thanks a lot mam for your response ❤️your videos really helping my semester preparation 😄

[@anujbhattarai8493]

@@TechnoTutorials2783 Mam what about characteristics table

[@akshaydhiman3262]

Mam app up down counter banana sikho please 4 bit

[@TechnoTutorials2783]

Kisse sikhu

[@zenaib_]

What about truth table😢

[@anujbhattarai8493]

I was asking the same question. I need the truth table.

[@user-xf1fp2tk3k]

Tf is this Hindlish