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Uh-oh, It's I/O Ordering! - Will Deacon, Arm
The Linux kernel provides a rich collection of memory barriers which can be used to enforce ordering of memory accesses between multiple agents. In the case where these agents are all CPUs, we have recently adopted a formal model which allows developers to reason about concurrent interactions between them. However, when I/O and DMA-capable devices are added to the mix, the semantics once again being blurred and recent discussions on the mailing lists show a common lack of understanding of the intended barrier semantics.
This presentation will give a brief tour of the I/O ordering barriers support in mainline Linux: which barriers to use in your driver, when you need to use them and how to achieve the best performance.
About Will Deacon
Will is a Linux kernel hacker at Arm Ltd. with an unhealthy interest in concurrency and computer architecture. He is an active upstream contributor and co-maintains various parts of the kernel including the arm64 architecture port and the memory consistency model.