NSDI '18 - Azure Accelerated Networking: SmartNICs in the Public Cloud

[@pradeepnallimelli3170]

Very good presentation and good view of Azure !! Question: Why cant you embed NIC functionality into FPGA and get rid of NIC/ASIC in the middle.. From your presentation, it looks like all that NIC doing is SRIOV to VMs which FPGA's can do too..

[@MohammadIshfaqueJahanRafee]

Quoting straight from the paper here: "Another option was to build a full NIC, including SR-IOV, inside the FPGA - but this would have been a significant undertaking (including getting drivers into all our VM SKUs), and would require us to implement unrelated functionality that our currently deployed NICs handle, such as RDMA[14]. Instead we decided to augment the current NIC functionality with an FPGA, and initially focus FPGA development only on the features needed for offload of SDN."