More Ram? - Making an 8 Bit pipelined CPU - Part 91

[@DavidWatts]

Forgetting to cut the tracks is something I have regretted many many times.

[@weirdboyjim]

That was really close actually, That actually had a the possibility of causing damage beyond the memory board. Could have been an extremely bad day.

[@RoamingAdhocrat]

13:30 I was waiting for this… Most of my projects are on stripboard and dear goodness I need to move on to PCB

[@weirdboyjim]

Cheap and Easy PCB prototype services have made home electronics so much easier!

[@RoamingAdhocrat]

@Alex Shilson my feeling is that breadboards are fine when prototyping but they're a pain to resume on after six months in a drawer

[@edgeeffect]

No offence intended to James... but "real men build on veroboard" ;)

[@vastrix1594]

I can see why you went with the shadow ram approach, tho the banking implementation would've been interesting.. :) I would very much like to see the assembler changes you made!

[@weirdboyjim]

Thanks Vastrix, the 2 big "visible" changes to the assembler are the expressions but also it now supports dead code stripping. That makes it much easier to have lager libraries that I only use part of at a time.

[@McTroyd]

I always thought it'd be a neat trick to put the ROM and RAM in the same address space. One could copy data from the ROM to the RAM by seemingly overwriting that memory space, then popping a flip-flop so the next read comes from RAM instead of ROM. I guess the reverse could be implemented to provide some nonvolatile storage on your computer, though the timing might be tricky. 👍 Hope you've managed to stay well clear of the heat and wild fires, which I know have been causing trouble over there.

[@weirdboyjim]

The design I ended up here was the end product of thinking along those lines.

[@jensschroder8214]

If ROM and RAM are in the same area, then it is only necessary to switch between ROM and RAM when reading. When writing, it can only go to RAM. So when copying, it would only have to be read from the ROM and written to the same address in the RAM. Finally, the ROM can be switched off.

[@edabean007]

i am still trying to get a z80 running with ram and rom on breadboard. This is Awesome. keep up the Great videos please :D

[@weirdboyjim]

Thanks Bean, hope the breadboard z80 works out! Where are you having difficulty?

[@MrRlnansel]

A simple way to do the copy into shadow RAM might be to use a flipflop and a gate or two to treat the EEPROM as read-only and the RAM as write-only on reset (i.e. the EEPROM gets chip select only memory reads and the shadow RAM only gets selected for memory writes in the same memory space). Then you run a copy program from EEPROM as a simple loop that reads each relevant address from EEPROM and immediately writes the same value back to to the same address in shadow RAM. Once you've completed the copy, you reset the flipflop to now gate the low memory read and write and chip select only to the RAM so the EEPROM no longer gets selected.

[@weirdboyjim]

Ha! I had that same idea, I rejected it in the end because the circuit complexity isn't much different than what I'm going to do and It wouldn't make it easy for me to take advantage of the faster speed from ram.

[@MrRlnansel]

@@weirdboyjim I am assuming you will be using some sort of a wait state circuit for the EEPROM (or perhaps just slowing your clock down during EEPROM to RAM copies), which you would then disable when you switched over to the faster RAM. How else would you see any speedup once the contents of EEPROM are copied over?

[@weirdboyjim]

In my build every cycle is a memory operation, so I'd just have to implement variable clock rates. That's really why I chose the shadow ram system, the copy will happen from a dedicated circuit during reset and then the cpu can start running with the assumption of the faster memory.

[@TheEmbeddedHobbyist]

All you need is a small boot loader in rom at the reset vector to load in the program from an external source.

[@weirdboyjim]

I really have thought this through, I've picked this option to keep roms out of the memory pool and to keep the actual execution start-up simple.

[@axelBr1]

The work on your assembler is impressive. Which computers are you mention shadow RAM? I'm thinking that most "industrial" computers of the 1980s, i.e. those running CPM, or the Amstrad PCWs had a small amount of ROM that would load the OS (CPM) or application (PCW, I had the word processing application and I think it was a PASCAL compiler), into RAM. I guess that ROM could be switched out after it had loaded the OS / application, as every KB counted. Regarding banking of memory. Is your explanation correct, because a CPU with a 16 bit address bus could directly address all 4 of your 16K blocks directly? My assumption was that a (or a number of) memory locations would be used to latch a bank selection of 256 x 64K banks. The each memory read or write would be a write to the bank selection and then access the bank as normal. I'd assumed this was never done for home computers as 1) no one could afford more than 64K of RAM, 2) the RAM if your could afford it, took up a lot of physical space, 3) the performance impact of potentially multiple writes in order to access the bank of memory (bank faults?) bearing in mind CPUs were only running at a couple of MHz, 4) only really practical to write a program to do this using a compiler, rather than BASIC 5) probably limits an application to a specific memory size

[@weirdboyjim]

Later 8-bit micro computers did implementing banking using techniques like that, it was left to the programmer to optimize access into regions. If I wanted more than 64k I would work the address registers to have more bits rather than mess around with that though.

[@hammersbald7612]

11:00 when I was working on my vga circuit I finally gave up on breadboards and went directly to pcbs. If I have cut and strip one more wire I’m gonna loose it...

[@weirdboyjim]

I don't mind cutting a few wires, but I think breadboards are going to struggle for the high frequency sections of the vga circuit. I may end up pcb'ing sections of it early.

[@lawrencemanning]

@@weirdboyjim you know to tease your audience James. :)

[@weirdboyjim]

You have to know I wasn't planning a low resolution slow access device?

[@lawrencemanning]

@@weirdboyjim well I've been waiting eagerly to see your VGA implementation since you first teased everyone with that 25.175MHz crystal. :) and yup I think you're right about going for PCBs right away. It can be done on bb though.

[@lawrencemanning]

@Alex Shilson Radical Brad is one of a kind though. :)

[@jerril42]

Thanks James. That was a cool hack. Take care.

[@weirdboyjim]

Thanks Jerril! I appreciate the support!

[@AjinkyaMahajan]

You can emulate bootloader in a flash memory chip then copy only the subroutine to ram with the same hardwire method as you did with PCB. 64K total memory reminds me of parallax days. Cheers 🎊✨

[@weirdboyjim]

Thanks Ajinkya.

[@OscarSommerbo]

Instead of stripboard you could just have bent the WE leg 90 degrees and solder on the wire to the pin.

[@weirdboyjim]

I could have done, what I actually should have done is designed the temporary pcb I ended up with in video 96 from the start. Much easier all round.

[@brandonmack111]

Some banked RAM would still be pretty useful of course ;) any plans to make it so you can load from an external storage device like SD? That would certainly make programming less hassle.

[@weirdboyjim]

I'd like to avoid banked ram. It was mostly done as a way of expanding the address space and if I really needed that I might revist and look at adding something like segmentation. Or just adding a few bits to the address registers. SD card is currently the front runner for storage solution, not relishing writing the code to parse FAT in hand coded assembly though.

[@edgeeffect]

@@weirdboyjim way back when... I did some programming with FORTH and they had a perfect technique for dealing with file systems...... they just didn't bother.... they would just load code from it's block address and skip all that "tedious mucking about" with file names and allocation tables. :)

[@brandonmack111]

@@weirdboyjim true enough, I don't envy you the task of interfacing with it, but then it will also be awesome to have removable storage available.

[@JonnyBergdahl]

Oh, this brings me back to the C64 times, you could switch out the ROM and access the full 64 kilobytes. Nostalgia!

[@weirdboyjim]

A flat 64k of memory feels like loads when your are hand coding in assembly language.

[@JonnyBergdahl]

@@weirdboyjim Sure did! I think my biggest program was 12K in the end, and that included some graphics binary blobs.

[@weirdboyjim]

Graphics and sound were always big consumers.

[@Quxxy]

You know, I got to thinking a little while back how you might go about storing and loading programs. *Apparently* the old floppy drive interface ran on 5V logic (based on my incredibly limited understanding of electronics). I don't know if it's possible to drive a floppy disk drive from the kind of chips you're using, and finding working drives and disks could be tricky... but wouldn't it be cool if you could? I believe you can get USB floppy drives, which would let you access disks from your development machine. Or, you know, you could be sensible and do something probably much simpler like have "network boot" that uses the serial line.

[@weirdboyjim]

Storage device is an interesting challenge. Finding something that is 8-bit era appropriate but still easily available is tough. I don't want to go all the way to usb, but the pc floppy interface would be a big circuit. The C64 floppy interface is basically UART but those drives are starting to get harder to find. I have a plan though.

[@lawrencemanning]

Compact Flash is perfectly doable. Older parts, upto about 128MB capacity, usually have an 8 bit mode so you don't have to latch the top byte. No need for a file system if you don't want one, too. Though I'm sure James would enjoy writing a FAT16 parser for his processor. :)

[@edgeeffect]

I was just playing with a USB floppy drive before watching this video and everything you say is pretty much right. Well, except "finding working discs and drives could be tricky"... I've got loads of both squirrels away. ;) ;)

[@matthewpeterson5159]

Why build circuitry to copy the ROM rather than have the ROM program copy itself to RAM and then disable ROM? Also, a simple XModem implementation should serve you well for downloading code over serial. I've been using it for my 6502 system and yeah, the hassle saved by avoiding having to reprogram a ROM every time is incredibly worth it. :P Anywho, nice work as usual! :)

[@weirdboyjim]

That would be a basic banking system. I did consider it, but to get any speed advantages from the ram I would have to implement software adjustable clock rates and I really didn't want to mess with that.

[@lawrencemanning]

You could also just in situ reprogram the EEPROM. Copy the boot loader to RAM first as the EEPROM is locked out for the page write timeout but this is easily done. A bootloader would fit in a few 64byte pages. See the AT28C256 datasheet for the exact timing but from memory it's about 60ms per 64 byte page. No rewiring is necessary to implement this as an EEPROM can be reprogrammed in circuit by the processor. EDIT: relies on the /WRITE line being routed to the processor. Don't know if this would require a bodge wire or not.

[@weirdboyjim]

That would be great Lawrence, right up until the point where a software bug trashed the bootloader. I don't trust my own coding enough to allow the possibility ;-)

[@lawrencemanning]

@@weirdboyjim you could write protect it using an addressable latch or similar. Or add a jumper which either ties /WRITE high or routes it from the processor for more security.

[@lawrencemanning]

Actually since the board is on show use one of those nice latching buttons.

[@djc1402]

Another though provoking video. I noticed that you hadn't cut the strips before trying your RAM board. I use a drill bit to cut the strips by rotating it in a hole. You can also get a specialised tool that looks like a screwdriver to do the same. I would also add a decoupling cap to the board. I had the same thought for my CPU by using a RAM in place of the ROM but adding a 'dead-bug' voltage circuit and battery back-up and program it on a TL866 programmer and move it over to the CPU while its powered by the battery. I haven't tried it yet but have seen other people do it. My CPU does however have a monitor program running in ROM and I download programs and pictures from my laptop over USB, and this makes it so much easier to develop software for it. Another thing that struck me was that you haven't left any room in your memory map for video, and depending on the resolution and colours it can be a significant part of the memory. Have you any thoughts about that yet?

[@weirdboyjim]

Interesting, I had the same thought about trying to program the ram in the programmer and then having a battery backup. But this was a stepping stone and it gave me the opportunity to test executing code in different memory chunks.

[@JohnDlugosz]

Did I miss the video where you defined lodsb and stosb instructions?

[@weirdboyjim]

No, I never included that in a video as the instructions are extremely close to ones I had already done.

[@neilsharman7876]

Will eliminating the EEPROM memory really allow for a faster clock if the pipeline code is still using its four EEPROMs. Won't those EEPROMS immediately become the clock bottle neck?

[@weirdboyjim]

That's a great question, I'll probably do a video at some point on the critical path and how it all adds up. The simple answer is that yes, the pipeline control roms are already a clock rate restriction and would become more so if I speed up the memory. At present I'm using AT28C256-15's, they have an access time of 150ns. Once the isa is finalised (soon!) I'll switch the control roms to AT27C256-45's, they have a 45ns access time. Now I could use those for program rom's but they are One-Time-Programmable so it could get frustrating (not to mention expensive) trying to debug code.

[@MrSapps]

@@weirdboyjim what about using shadow ram there as well? or is that too crazy

[@christophfriedrich5092]

Nice work!

[@weirdboyjim]

Thanks Christoph!

[@connorwood95]

Modern CPUs use pagination as well. Albeit for isolation, rather than memory space extension, but nevertheless using the same kind of technology

[@weirdboyjim]

Hmm.. I suppose you could say that, but I tend to think of modern paging with an ldt/gdt to be a very different thing that banking. The former is very much about controlling process address space but the latter is mostly about overcoming limitations of the system address bus.

[@-lolus-]

i wonder how fast can it go with that ram instead of rom

[@weirdboyjim]

Indeed, I'll give it a decent test once I've finished the pcb conversions.

[@AJB2K3]

reminds me of early mods to c64 to use 2 sids

[@weirdboyjim]

People did crazy things in that era. Modern hardware is spoiling everyone.

[@richardlighthouse5328]

All microcontrollers reserve bit of space to bootloader. Will you do the same? like 1k or 2k of space to implement serial bootloader over uart.

[@weirdboyjim]

No reservation at the hardware level, but I'm expecting to write a boot loader as a piece of library code and add it to any roms where I have space (which will be most of them).

[@tristunalekzander5608]

So you only have one RAM for everything? My initial thought would be to have a separate RAM, one that gets the rom copied into it and another for data memory.

[@weirdboyjim]

There is actually 2 separate 32k sram chips in this configuration, but they form one contiguous ram address space.

[@polygorg]

A gigabyte of ram should do the trick.

[@weirdboyjim]

Bill gates said 640k is enough for anyone!

[@johncochran8497]

@@weirdboyjim and we've all seen how well that statement aged.

[@TroySchrapel]

Here I am with 256 bytes...

[@weirdboyjim]

256 bytes is actually pretty reasonable for small hand coded programs, but I'm going to need some more space for code and data, especially once I start taking chunks for the vga.

[@TroySchrapel]

@@weirdboyjim I cheated a bit for my snake program. I have 256 bytes for the program, but a separate 256 bytes for runtime. In my program loader, I added support for pre-filling the runtime memory. Effectively giving me 512. Without that, no snake.

[@weirdboyjim]

@@TroySchrapel That sounds like you are describing a Harvard architecture.

[@TroySchrapel]

That's right. If I did it again, I'd just go with 16 bit addressing. No separation.

[@ducksonplays4190]

@@TroySchrapel I'm greedy so in my CPU design I went with 24 Bit addressing.

[@wChris_]

why not have a really simple boot loader ROM, it can then copy itself to HiRam jump there, switch off the bootloader ROM for RAM and wait for data on serial to be copied to LoRam. Because you would be doing this with 32k of ROM it would be cool to have some sort of Trampoline in HiRam. that can execute various library functions in ROM

[@weirdboyjim]

That would have been the plan with bank switching, but I would either loose the ram speed advantage or I'd have to add circuitry to handle different timing while the bootloader is running from rom.

[@lawrencemanning]

@@weirdboyjim on speed, I thought your microcode used AT28C256 anyway? Or have I got that wrong?

[@weirdboyjim]

When I'm done, I'll etch a set of AT27C256's no reason for the pipeline roms to keep changing once all the features are added.

[@lawrencemanning]

@@weirdboyjim ah cool. 90 vs 150ns. I'm very impressed that your processor can outstrip a 150ns part! It would be interesting to see the timing on your /CE, /WRITE and /OE lines.

[@mtalhakhalid1679]

Greetings sir its great its a great work you are doug and i am big fan of such old school computers you have such tallent why not make your own arduino like board then make a rasberry pie like board in which you make your own os for that

[@weirdboyjim]

Thanks! Some interesting ideas there, doing everything one step at a time. I still have a bunch of work left on this project as originally envisaged before I add work ;-)

[@mtalhakhalid1679]

@@weirdboyjim thats great if you need any help or any way i can be part of it happy to help but a tallented guy like you should create his own computer hardeare capible of loading ps start from basic dos then to gui then make your own os usimg linux kernals ita easy for you 😊

[@FelixVazquez75]

to satisfy the crazy people..... lmao

[@weirdboyjim]

:-)

[@altamiradorable]

Wow ! All that useless work when all you needed to do is to bend the pin of the IC !!

[@weirdboyjim]

"Just bending the pin" would have got this step working quicker, but it would have been a total dead end towards the goal I was trying to work towards.