What is a CMOS? [NMOS, PMOS]

[@DKwonShin]

Two of your videos, just 15 min resolved all my confusion from the professor that he went over for 3-4hrs of boring lecture. Thanks man. Life saver.

[@copperwater8456]

these professors that can't explain shit should get fired. no excuse for bad teachers when we have to pay so much money to "learn" (teach our self)

[@hipis200cc2]

thx

[@aonoymousandy7467]

professors are fucking boring, almost half the class was sleeping and the other half was on their phones

[@rowdybabysnehag2643]

hi

[@DB-nl9xw]

This is how education should be deliver

[@utkarshrastogi8791]

Man your 8 min video clarified hours of lectures given by my professor

[@Lukey_Luke]

4 min video with 2x speed :)

[@Wire_Speed]

SAME

[@MHS-uo8mh]

😂

[@darthvader5300]

In the early 1980s CMOS being explained in this way is different to what we personally got from a Japanese engineer who said "basically CMOS is more like a layering process but you must first determine what you need so that you will know exactly what is needed to be done first" It is like creating a multi-layered cake. That is the problem with education today, they try to make things unnecessarily complicated and sophisticated when they can make their explanation so simple WITHOUT LOSING THE GIST OF THE ENTIRE SUBJECT itself. This is why Japanese education is far more effective to the point that they made CMOS technology so simple that it allowed them to use simple designs, larger size components, and compensate by using larger size silicon chips the size of small average letters. They did that in the early 1980s which is why they have beaten the U.S IC chip makers in the international market competition. Now with maskless ion beam lithography and electron beam lithography and hybrid ion beam-electron beam lithography using laser guided guidance systems for positioning and alignment, they have made CMOS far effective in cost effectiveness and achive zero defects/zeo rejects status.

[@VndNvwYvvSvv]

Lol, what a horribly biased rant. Muh sinophile education bus muh superior, lol. No, that's not where the advances in semiconductor and engine manufacturing came from. Please stop spreading stereotype-based misinformation like that.

[@darthvader5300]

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[@MS-qh3iz]

Thank you so so so much for explaining this so clearly! You neatly surmised everything that's in my course about CMOS so this is the only resource I have to refer to pass my class! Thanks again! :)

[@anveri867]

15 min is all it took my teacher drilled my head for 1 hour and still nothing went into my head. Thank you 😊

[@silvansommer4689]

But a PMOS alone is also inverting his signals ? why we need a NMOS transistor too, to make a inverter. Why we dont use only a PMOS ?

[@straightmaster]

My guess is that the electricity needs to go unload somewhere

[@ysin4121]

7 mins solved my 70hrs doubts. Thanks mate.

[@rabeyaallah]

I think we need a CMOS instead of the pmos or nmos alone because the pmos gives strong high but weak zero, and the nmos gives a weak one/high and strong low/zero. that is why the pmos is stuck to Vdd and nmos is stuck to GND. So we can have rail to rail switching(strong zero and strong one or high).

[@bickyou4696]

sir, what is the meaning of "strong" zero or one ?

[@stego4LP]

@@bickyou4696 It means that it is a clean signal. If you define your high as 1 volt it is "strong" in the sense that the whole 1 volt is transmitted and not only 0,7 volt.

[@rax6254]

@@bickyou4696 PMOS is better at pulling VDD to output and bad at pulling GND to output and NMOS is better at pulling GND to output and bad at pulling VDD to output.

[@whenyoudiporeosinmilktheyb8329]

great explanation! but why do we need a pmos and a nmos to build a inverter, even though a pmos alone kan invert a signal?

[@abheetl9743]

If there was one PMOS only, you could either give it a low signal, which would short the drain and source, yielding a high output. If you give it a high signal, the drain and source would not be in contact, hence the output would be floating and not grounded as in the CMOS inverter. Correct me if Im wrong.

[@thomasthereal4067]

6:10 the moment when you finally understand a thing you've had trouble ofer the last couple of months understanding... THANK YOU SO SO MUCH

[@syedkal29]

Dude I studied electronics long back and now refreshing my basics. Great video. Thanks.

[@cscholar]

Why do you need a CMOS, if PMOS does the exact same inversion?

[@ElectricVideos]

The PMOS is just a switch. You need values for the transistor and that is why we have a VDD and a ground. VDD represents a value of lets say in binary "1", and for the ground it represents a value in binary "0". Let's say you input it zero, the PMOS is switched on and the VDD passes through the output. The ground does not pass because the passage way is open since the NMOS is switched off given the same input. That is why you need a NMOS and PMOS together to make an inverter, which is essentially a CMOS

[@daemon7777]

You can build every circuit by just using NMOS. This is not the reason why we use CMOS.

[@宏康-d3g]

Unfortunately ,pMOS and nMOS they are not perfect switches in the real world(there are some delay), In particular, nMOS transistor pass 0's well, but not for 1, pMOS transistor just in the opposite reason. my English is poor, i am not a native speaker. i hope it can help you :)

[@anthonykraimaty]

And we can build every circuit with PMOS. We use CMOS in order to avoid the losses caused by PMOS OR NMOS. We have more than 0.7V loss per gate. When we have multiple gates cascaded this loss will increase in a purely PMOS circuit (or purely NMOS). CMOS is used to minimize the losses. This is why it is used in logic circuits.

[@larryp7687]

PMOS alone would not provide a path to ground. A logical circuit has much more capabilities if another segment within a larger circuit can logically flow to its ground through the NMOS, if logically appropriate, otherwise the logic is stopped, as the positive voltage from the other part of the overall logic circuit has no way to get to ground.

[@apiitg]

PMOS was also acting as an inverter on its own then what is the advantage of CMOS?

[@poetrybyzara]

Literally i don't find video related to this topic... man your video help me a lot

[@saraharar3114]

OMG ! u saved me , I have been looking for this so long ! THANK YOU SO MUCH

[@aliemrecetinkaya2119]

Thank you so much, I really understoood it CMOS, NMOS and PMOS. This channel is best!!

[@epheboss6370]

thank you very much after 8 years.

[@mohsinqureshi6850]

This video is something else , keep it up buddy , hats off to your explanation

[@iiirannn1]

not clear, what do you mean by output? output at the drain or at source?

[@markharrisllb]

Before this I watched a 30 minute video that just gave me an headache. Yours was extremely clear and easy to understand. The only problem was I was unable to click on the box for the practical example, but the video is five years old.

[@tmeryhewjsf35]

Simple and to the point. Thank you!

[@justabeliever81]

If pmos itself behaves as inverter then why do we need nmos?

[@ChoaibElmadi]

Let's assume that we have '1' as an input. I think that in the case of not using the NMOS will generate something like an open circuit sinse the PMOS is OFF.

[@sharifahbasyirahsyedzainal4855]

What a brilliant way of explaination! Thank you!

[@andrewdewar8159]

You've put Complimentary, and,, not meaning to find fault, but its Complementary which means things that are different but enhance each other. I think that's why its called Complementary Metal Oxide Semiconductor, the nmoas and pmos work well together. Whereas , complimentary means giving praise, or something given free of charge. But I enjoyed your video it was really good !

[@oscargonzalez3466]

The educational pill i was looking for!!🎉🎉

[@xinsu6589]

Please do more on computer architecture, you are great!

[@TrionityIr]

4:15 Shouldn't Vdd be Vss instead at the top, since it's a P-Mos? It doesn't really matter I think but I wanted to know what you thought about my question.

[@cherchetutrouve6056]

thank you sir , you have a voice of a teacher , thank you ,

[@LoscoX]

VEry thanks, you help me a lot for tomorrow's exam

[@prakashb1278]

This just saved me a lot of time. Sincere thanks!

[@anismaliki3478]

This is actually mind blowing

[@AhmedKMoustafa2]

I was the 155th subscriber two years ago :D you deserve more than 50k subs. lets hope you get there next year.

[@jamesbrooks5058]

LITERALLY the best 7:53 I've spent in my life

[@simstudiosofficial]

8 years later. Thank you

[@ajithkumar4256]

Great work brother. Watching in 2021.

[@a98985240]

thank you so much for the video!!! I just have no idea what my teacher was talking about in the class but now you neal it ,fully explained nice!

[@sauravsingh6726]

you are really good man,great explanation in short time

[@quanquanlive]

Very easy to understand. Thanks Sir.

[@Semihszy]

ok but why would you not use only pmos instead of pmos and nmos combined if this cmos inverter works just like a pmos?

[@vladomalekovic6368]

we use CMOS tipe because the power drain is much lower on combined tipe than in a pmos on its own ... example in a microprocesor with olnie pmos transistors your power drain of the procesor will be >"100W" but in combined tipe of CMOS you dont need that power. so the CMOS transistor tipe is used in low energy consumption devices or microprocesors (CPU-s).

[@toasawamura364]

Bro, Thanks Fam, Respect

[@brett1234-s7f]

Probably a dumb question but the input voltage on the cmos is always the same across the pmos and nmos components correct?

[@fernandoarcia4407]

Thank you for the explanation buddy!! Greetings from Nicaragua 🇳🇮

[@KermitDominicano]

Very well explained, thank you

[@gothien205]

can we use only NMOS to make the inverter? it has the same logic table.

[@nilkanthadey8899]

please explain the concept about cmos transmission gate

[@kollunageswarrao5179]

Love from India 😄

[@AJK544]

Wow... thank you for your lecture

[@agstechnicalsupport]

Thank you for the instructive video on CMOS !

[@mrunalrawade2123]

thank you for such good explaination

[@fanfare3185]

thanks man, you saved my life. Cool vid

[@sohomdey51]

Very good explanation ❤

[@m101ist]

Shouldn't the two inputs be connected together for a inverter output or not gate.

[@Hiet4]

Great video, very helpful!

[@gazanfarmollazade]

Thanks so much!!! It was very helpfulll

[@chamodhsamarakoon]

Thank you very much ! You have enlightened me 😊

[@saptakidebnath5774]

i really appreciate the way u explained everything.... in a very simple manner.... that's a helpful vedio.. i like that

[@dattatrayphatnaik4735]

in NMOS transistor what should be the value of Gate input for whcih the transistor is in conducting state, will it be high or low or none?

[@mrohitsingha1615]

Please make vedio on ecl

[@yamzrob7459]

Does this cover pmos and nmos properly as well?

[@pinkkitty6553]

if PMOS itself acts as an inverter why do we use a CMOS ?

[@sulochanawanaskar4040]

very helpful thank you

[@rashedkarim5833]

you welcome

[@mariamb.habeeb2669]

Wonderful

[@meditator5895]

Thank you very much.

[@bitanpramanik6672]

You say if input is high in nmos the output will be low for the ground zero..But You write in your slides for nmos low Will be low and high will be high in the output..please make understand?

[@Anonym-cz6tb]

bro is saving lives

[@brucehuynh4778]

Very helpful

[@davidmitchelwinograd7146]

I love this man

[@igrewold]

Great stuff, thanks man.

[@miss.deluluxx]

Nice handwriting

[@ChristelleMajestrado]

what is perfarm?

[@josedou6312]

Very helpful man! Thanks

[@nishthajethi4448]

Nice video

[@younes9482]

Thank you for this educational video🙏🏽👍🏽!

[@shiraku3885]

What pencil u using.

[@ahmedmoumsik4624]

WHAT IS THE PRINCIPE OR THE FUNCTION OF THE WHOLE IN PMOS ?

[@mz8802]

But a P-Mos itself is also a Inverter, it also does the opposite? or am i wrong?

[@akhilthomas2890]

The problem with PMOS is that, it provides a low not necessarily a perfect zero (when the input is 1). That is, consider 1v as perfect high and 0v as perfect low when inputting perfect high (1v), we may not get perfect low (0v), instead we may be getting .2v (which is considered as low and not a perfect low), this is due to current leak in a transistor which in turn is due to quantum effects such as quantum tunneling. so my point here is PMOS is good for getting 1 as the output and does a poor job in the case 0. where as NMOS is good at giving zero as output but provides a poor quality 1 as output. Therefore we combine this two things and make a circuit in such a way that it provides perfect high and perfect low. hope this helps you! Im not sure about this though correct me if im wrong

[@mikeahmed7092]

Excellent Explanation!

[@uisaerospace6677]

Beautiful

[@athuldas44]

thanks bro it really helped me

[@vikramrathaur3817]

short and nice explaination

[@StevenStGelais]

Thank you good sir

[@US-Warrior]

How is TTL volatile

[@classroom7619]

nicely explained

[@Jiostores]

Don't know why does clg proffesor do simple things into complex

[@MdMehediHasan---ss8ih]

Good

[@TomSmith-nn8gy]

nice job. thx for helping me :)

[@zaheersuhabuth2677]

Bro, i suggest you connect the '2''inputs as technically they are same

[@dinagiselabluemel9169]

This video just saved my ass… why can’t professors explain like this 😅

[@warunakumara7671]

sir does p mos is a p type jfet and n mos is a n type j fet

[@m101ist]

It's not a J fet ( junction field effect transistor) it's a Mosfet ( metal oxide semiconductor field effect transistor) insulated gate. P Mos - p channel N Mos - N channel. P Mos with N substrate, sub base, pnp. N Mos with P substrate, sub base, npn.

[@abdurrashidsawom1629]

thanks brother.......

[@rishavkumar9288]

Like the video only seeing comments😂 outstanding

[@christopherjosekrauss9245]

Can someone splain to me the diference between PMOS and CMOS?, both give to us a result of a inverter. I'm wrong?

[@michaelryan2387]

is there a difference from an nmos and p channel misfit

[@vodnalasrinivas1911]

thanks brother

[@caseyzduniak632]

you are welcome brothyer

[@henrytzuo8517]

THANK YOU！

[@neerigattisomasekhar4910]

nice explanation sir

[@ElectricVideos]

Neerigatti Somasekhar thanks

[@matejharesta5907]

why NMOS haven´t hole?

[@rakeshreddyabbireddy8876]

Good lighting bro

[@Mikano_ñ]

Bruh I just learns about CMOS and I originally was searching on how to update BIOS prior of using Matisse CPUs. I’m 15 why the hell am I learning this.