What is a Flip-Flop? How are they used in FPGAs?

[@afzal5569]

Now its been 7 years u upload the video. I m doing masters in power electronic and control . Starting i don't know about FPGA. Even my teacher teach be about FPGA. I didn't understand what he said. But U are genius, and i understand what is FPGA . I watch your first video. This this is my 4th video. I m gonna watch your all video. Thanks again .... keep it up.. sir ..

[@splitpersonalty]

You explained this the same way a college buddy would. You're really good at this.

[@mikail5682]

We did these basics in cs courses, but you fill the gaps in my knowledge very nicely. Those bits of intuition you give make it a lot easier to digest

[@ProblahDefied]

More videos!!! These are great. It's like FPGA for dummies.

[@GalinaMalakhova]

I love your videos man. I'm a new FPGA designer (and a mechE, so totally don't know electrical stuff) and this is really helping me to grasp the basics!

[@codesurge6838]

Your tutorials has been great! You provide layman explanation on niche technical terms, it is newbie friendly! Thanks for your effort.

[@renepromesse7410]

I've been struggling to understand the concept of flip-flop, but now all I can say is thank you.

[@MontanaPreston]

Thank you SO much! I have been learning fpga's and verilog for a long time now at CU Denver and am going to watch your whole series bc I just seem to be struggling so much. You are so much more helpful than my professor and I really want to learn!

[@flain283]

Watched this for the second time, 6 months after the first, but now i have an FPGA dev board. light-bulb moment such a simple thing that as a traditional software programmer i never had to really worry about but this video really helps my understanding as i work on my FPGA project.

[@abelashenafi6291]

Thank you!!! for all of your videos. I mean for all of them. I'm Glad i subscribed and thank you "youtube" for providing the platform for seeing a one in a billion tutorial like this. Thanks man I really mean it.

[@tote4162292]

Should have paid more attention in class but this feels just like a personal explanation from my professor, so thank you so much!! I feel confident about going to class tomorrow.

[@thetenderloins6564]

That was an amazing elucidation of what a flip flop is....simple and crisp.

[@xinxingwang7902]

Good job dude, nice explained and easy to follow. Very interesting to me since I am new to FPGA. Looking forward to your next video!

[@loucostello3111]

Russell. Your video tutorials are the best. I'm ordering a Go Board.

[@songxiaojia4135]

Your talking way is very comfortable to me. Update more videos. I like FPGA.

[@dennyhuang4231]

very useful video. I am new to FPGA, but it is very easy to understand what you say. Thank you.

[@nickasher7105]

Thank you for making these videos, they are awesome and the way you explain things are awesome.

[@vilaparthyvenkatkamal5175]

Please make much more videos sir, you’re a great teacher . Please do more videos on these type of contents

[@azimxmalik]

I would watch these videos all day.

[@akashmusiclove3554]

Sir,please post more videos. Your explanations are really easy to understand. Helped alot. Thank you.

[@wileyoptimistic7820]

Seriously? Kitna Padhai karega be? :/ . should i even be surprised to see you here... Jokes apart, thanks for the brilliant explanation man

[@shirleyachara3809]

The flip flop and rising edge of the clock was so well explained, thanks 🙏

[@PLAIDSHORTS1]

This video is literally GOLD.. ty so much!!!

[@sonasucnad]

These videos are great. I was able to get a really clear understanding of the flip flop after this video.

[@chathurikadilhani1951]

Ur teaching pattern is quite interesting.. And also speaking style is very pleasant. Well done thank you 🙂💐

[@sriramgowtham5471]

Just loved your way of explanation...

[@biancasandu789]

Oh thank you for making this video. It was a pain to find something understandable on my 0 level in electronics. Like the other comments say, please, do more videos. We like your videos a lot :)

[@samykamkar]

Thanks for your videos, they're great! I am a little worried about how much ink is getting on your shirt, though.

[@thuydang3668]

I confuse how to save date with D when D changing with clock in H state.

[@Dougie-]

Easy to follow, good explanations. Subscribed. Please more videos :)

[@josech5743]

Thanks for making this videos they are great and very easy to understand even for me that Im not a native speaker

[@enverkaancabuk73]

Q2 is logic low because of propogation delay at second rising edge.Q does not change at the same time as the clock. It has a small delay each time.

[@chandlerscott2257]

You sir, are a master. Thank you for this!

[@Diego-jd2md]

Great video , really good explanation !

[@sunweaveryt]

Amazing video, this is a much better explanation on D Flip-Flops than my professor gave me. Too bad you couldn't be teaching my digital logic class, because I am sure I would actually learn and enjoy the course.

[@huanlinxberkeley]

Very good explanation. Still relevant today!

[@kapilgarg1032]

it is old, but still helping people. It is really helpful.

[@MrPissefanten]

Great Videos! I am stil hoping for more in the future!

[@praveenvatambeti591]

Great Tutorials Sir Please do more. Thanks!!

[@liangshi6965]

plz add more video :) can't wait!

[@jostafro4967]

These videos are great, we need a bigger board

[@raphaelvista]

Great explanation! Congrats

[@zt9283]

OK, this is "The" channel for FPGAs

[@Richardhu1983]

Clear and helpful. Thank you very much!

[@aryamaanjain3263]

Thank you! Exactly what I was looking for.

[@ethiopiaandenet896]

Thanks for the video , please continue your good work , believe me they are very helpful .

[@PoorNeighbor]

if you look closely you'll actually see that he is not standing but is rather sitting on something

[@JrShikap]

u r a great orator ,, please keep on making these kinda videos

[@SameBasicRiff]

one way to think of it too, is the "gears" or clock are like tidal waves, coming in and out, with the polar harmony generating the "life" of the circuit. (this helps if your familiar with the concept that the early earth had a moon closer to it causing 100 mile tides, potentially creating life, just like the "life" of the circuit is created by this back and forth, on and off, clock motion. but anyways....... lol)

[@Gunth0r]

Thanks mate, explained calm and easy!

[@forhadahmed4643]

brother many thanks for the easy cool presentation....

[@abdeljalilgzili8662]

thank for your videos they are really helpful .. just i want to say that i use NE555 like a clock

[@andrearson2748]

This was really well explained, I agree with the other comments--make more videos!

[@ami6packs]

Excellent introduction

[@juniorfsonline]

Great videos, very valuable content, thank you for sharing your knowledge, congrats!!

[@sureshm3859]

Your are the best teacher thank for ur wonderful video explanation

[@tgroh007]

Thanks Russel, very well explained.

[@jonathandriller2028]

All tha brain storage to learn about all the different flip -flops... sigh - thx Nand great video !

[@dr.muhideenhasan2757]

That's great. Thanks for easy way in explanation .

[@samarkhan3154]

thanks mate you saved my test

[@Nodal488]

Best explanation ive seen so far :p

[@viswanathanramakrishnan7613]

Superb information. Will you guide to use flip flop's in making a model train signalling system involving only 2 leds (red and green) per flip flop cascaded so that each flip flop triggers the next one so that green becomes red once the train passes the sensor say magnetic reed switch on the track.

[@TwoVera]

Thanks this really cleared up a lot of stuff.

[@Abdiaspeguero]

First time ever I see this type of content and you make it pretty understandable! Please keep making this videos!

[@SameBasicRiff]

thanks for the videos! and thank you for your website too! i dont really understand why so many people work so hard to put out good work like this for everyone to use, when so many people dont even use it. they want better jobs and a better life yet these free resources go ....... anyway ..... //end of rant. thank you!

[@jaceklesniak9873]

I have not many time to learn, but I will try understand it. I love electronics :-)

[@campbell1175]

Well explained my man.

[@shadon_official2510]

such an amazing tutorial.

[@mrechbreger]

Thank you for this video!

[@Juanchofizz]

Excellent man, thanks a lot!

[@saul-gone-z3o]

Thank you so much! You save my life

[@drewjohnston9541]

Best video I've ever watched

[@oliviervalery1780]

It is really interesting. Thank you

[@arunramesh8133]

Excellent video

[@omarbaez9550]

Las esplicaciones son faciles de entender. seria muy conveniente poner una numeracion que indique una secuencia de videos de inicio al mas reciente.

[@Ed-et5gj]

Great work, keep it up!

[@BryanChance]

If there's a propagation delay in Q1, why not on D1? I can understand the second flip-flop being delay 1 clock cycle. But that's not the same as the sampling propagation delay is it?

[@jklax]

14:21 I'm confused. So does that mean the data is lost here since the clock doesn't see it?

[@AlancRodriguez]

Data tells Q if it should stay/go low if its low or go high/remain if its high. The only time that Q will read the data is at a rising edge.

[@mandeep5993]

Yes, that data would be lost. However, when you will learn more, you will understand that in real-world applications, this would not be a problem (a majority of the times, not 100% though).

[@rahulnayak1680]

Thumbs Up!! Buddy , U are Amazing...

[@misiayogi2225]

Thank you for this one!

[@taekwondotime]

Great video. Hard to find information on this topic with KZbin. A few comments though: A *register* is defined as a group of flip flops. Therefore, a 4-bit register is just a group of four flip flops, each one holding 1 bit of data. LUT? You mean a *truth table* . It's called a truth table whenever you're dealing with combinational circuits (the ones without storage elements). The moment you get into sequential circuits (circuits that have flip flops) it becomes a *state table* . I would replace "LUT" with "state table" because the accompanying diagram is called a state diagram, and then ultimately you produce the circuit diagram. A *state table* fully describes the operation of the sequential circuit. A state table contains a column for the present state, the inputs, the next state, and any outputs. But when you really get right down to it, the state table is just a truth table that includes present state as one of the inputs. It's also important to mention what a flip flop is. *A flip flop is storage for 1-bit of data, which can be either 0 or 1* . There are three types of flip flops commonly taught in digital logic courses: - D flip flop - T flip flop - JK flip flop *The D flip flop (data) is by far the easiest to understand:* - If you input 0, it stores 0 and outputs 0. - If you input 1, it stores 1 and outputs 1. *The T flip flop (toggle) operates as follows:* - If you input 0, the current state is maintained and outputted. (0 stays 0, 1 stays 1) - If you input 1, the current state toggles to its opposite and is outputted. (0 becomes 1, 1 becomes 0.) *The JK flip flop is the most advanced and most complex* . *It has TWO inputs (J and K) plus the clock:* - If J = 0 and K = 0: Current state is maintained and outputted. (0 stays 0, 1 stays 1) - If J = 1 and K = 0: Current state is set to 1 and outputted. - If J = 0 and K = 1: Current state is reset to 0 and outputted. - If J = 1 and K = 1: The current state toggles. (0 becomes 1, 1 becomes 0). Therefore, the JK flip flop can perform the operations of both the D flip flop and the T flip flop in one. Why use different flip flops? Well, sometimes the logic is a lot more complex to implement with one type of flip flop than it is with another. That can greatly affect the speed of the circuit.

[@habtamusium8646]

thank you ! i got some % about F-F

[@jamesmasonic]

thank you man, wish u make more tutorials

[@iborass]

thanks man, very good explanation . keep up

[@killer2point057]

Great info! Thank you

[@somekindofbluestuff]

love your videos!

[@asmatauqir7652]

Thanks, It was so good

[@Ian-Threaded]

More understandable than my penn state teacher. Thank you!

[@mosestewelde8163]

Ian F Penn State here too. What year do you take this class?

[@sujitsharma5158]

great work.... helped a lot👍👍

[@toninogalit]

thanx one question please! In the single and simple example of a Dflip-flop if the input data D is changing exactly with a rising cycle clock CLK, does the output Q of the DFF will perceive it or not?

[@jean-baptistelasselle4562]

Tony Sznabel Hi, I'm not the author of those videos, but here's my guess: Just as in the author explains in the case of two flip flop, "In the real physical world, it takes some time for the signal to rise", and in that same example Q2 is the data input of the second flip flop. My guess is, the time duration of that "some time to rise" is the sum of two times: T1, the time for the signal to propagate from Q1 to D2, like it's a cord. then, T2 is the necessary time for the signal to rise from low to high level. Why, in the real world, is there a necessary time for the signal to rise from a level to another level? Because this signal is never actually "square", it is an electrical current whose value is continuously changing, and here it is contiously rising from one value, to another. To convinced yourself, just say to yourself that the current value at a given instant CANNOT have more than ONE value, so the curve at the rise CANNOT be vertical. drawing it vertical is an approximation, just meaning the slope's gradient of tangent is very high, "almost vertical in the neighborhood". Very, very sloppy. In other words, current's value rises so fast, its curve looks like vertical at that point. Alright, so in the example with 2 flip flops, author says that when clock rise and Q1 rise occur at the same instant, T1 + T2 is big enough so that Q2 stays low, and he adds, "this is dued to what's called propagation time". So your question is "what happens to Q2 if T1 = 0?", isn't it? What I'm doing here, is shifting your exact question as closely as possible to the author's vocabulary, so that I can use the exact same reasoning as a mechanism to come to a conclusion, based on what the authored gives. Okay, so here 's my answer: the author, again, says that if Q2 stays low, it is dued to something reaaaally important called propagation time. Then my guess is: the answer to your question is that what will happen is kind of random, un predictible, and most importantly, IT DOESN'T matter, we don't care, what we care about (to understand FGPA's) is what happens when there's a T1 : T1 is not zero. Futhermore, T1 is considered non zero when it's big enough so that the system behaves with that VERY IMPORTANT thing that is the delay between Q1 and Q2: meaning the system is designed to behave WITH such a delay. Designers of FGPA's WANT that delay to be part of the behaviour of the system they designed. there's a treshold where that delay appears, what is the exact treshold we don't care, we'll eventually just tune it to some other system's tuned value, so that we get the desired collaboration between systems. To end with this, the value we are going to tune is a physical value measured for the electrical current, that one value that determines the slope of the rise of the (curve of the) current's voltage from low level to high level. Thank you very much for your question, it had think the whole thing over! And thank you to the author of the video for making and broadcasting them! Jean-B.

[@Nandland]

Probably not... There's a thing called setup time that is required. Meaning the input D needs to be stable for some amount of time before the rising clock edge comes along. This is a subject for a future video. I already wrote about it on www.nandland.com. Check the FPGA-101 page.

[@cybernatwa]

Digital Techniques ... How do you write in software?

[@erggish]

Thanks for the videos. My main concern is that, although I do get what is happening, I can't make the connection to an actual application that would need this method. So, why would retarding a signal by 1 circle be of use? Would it mean by appending several D-Flip Flops that share the same clock, I can keep in "memory" the data (for N flip flops I could keep the signal for N clock ticks)? Would that be how to create a "MEMORY" functionality in a calculator for example? (not sure if we keep the data or the output of the flop actually).

[@DevaDeva-oq3kv]

U are doing a great job!

[@mathewkyle8698]

Hey I get the propagation delay causing a 1-cycle delay but isn't the clock line going to one of the flip flops inverted so they never share the same clock signal? One clock cycle "traps" the data signal in FF 1 and the next clock cycle allows that trapped data to flow into FF 2... right?

[@Nandland]

All flip-flops in the design use the rising edge of the clock. They all get updated at the same time.

[@mathewkyle8698]

Thanks for the reply! I am obviously just starting to learn about this stuff and your videos are a huge help.

[@bhanusashankreddy5013]

is asynchronous counter.....synchronous sequential circuit??

[@boyracer3000]

How would D change to high before the rising edge? Would the data not be in sync with the clock?

[@Nandland]

The output of the flip-flop (Q is output) changes high or low depending on the D input. The Flip-Flop "looks" at the input when the rising edge of the clock comes along. This happens to all flip-flops in the system at the same time. Hope that's helpful.

[@fazilates808]

thanks a lot, really good explanation

[@evidencekatsanga4593]

very helpful . Thank you .

[@indunilvithanage]

Great tutorials ..thank you

[@rjgarnett]

The process control industry mostly uses SR-FlipFlops. No clocks just states!

[@Nandland]

For ASICs you mean?

[@jbx907]

i want ot make a sequence combination lock, where d1 d2 d3 and d4 must be entered in sequence to unlock and unlock a circuit

[@imho2278]

That's a shift register and Jim Pytel over at Columbia Gorge electronics 2 will tell you about them. He is great btw. Neso Academy does it well too.

[@xinxingwang7902]

One question though: Q2 is one cycle shifted w.r.t. Q1, but Q1 is not exactly once cycle shifted to D, right? It is actually like 3/4 cycle shifted?

[@damianbachmat1264]

Xinxing Wang Right, but D does not change along with the clock rising edge. In this example we assumed that D can change at any time.

[@Nandland]

There are some real world delays associated with changing flip flops, yes. Look up setup time, hold time, and propagation delay. But this waveform is exactly what you'll see in a simulation. Simulations are perfect case (no delays).