Why An Integrating Mode Phase Interpolator?

[@sunkarasaigoutham]

cc, thanks for providing this concept in an easily understandable way.

[@circuitimage]

Hi Sai, thank you so much for the feedback. I'm glad you liked it. :)

[@sunkarasaigoutham]

CC, one suggestion for your next videos. There are tons of High speed flip-flop topologies in the literature. However, please make a video on top 5 most popular flip-flop designs used in High Speed Transceivers. Thanks for delivering this High quality content.

[@circuitimage]

Hi Sai, thank you so much for the suggestion. I'll make a video on top 5 most popular flip-flop designs used in High Speed Transceivers, which would help so many followers. :)

[@abhiruplahiri1]

I missed watching your videos for sometime CC, it’s good to revisit this concepts. I always had this picture of so called integrating PI in my head for high linearity PI. Thanks for sharing the video.

[@circuitimage]

Hi Abhirup, Welcome back. 🙂 Thank you so much for the feedback for the IMPI. 😉 You're very welcome.

[@DDjadure]

這麼優質的頻道！！ 我現在都推薦台大ICS做analog, PLL / SerDes 的學弟妹可先看這個當基礎！！

[@circuitimage]

Hi Chieh-Ju Tsai, nice to meet you and I really appreciate your sharing and recommendations.

[@sunkarasaigoutham]

CC, Should the input clocks be only quadrature phase or there is no hard phase relationship between two clocks?

[@circuitimage]

Hi Sai, very good question, and thank you so much for the good catch. Unfortunately, the case study shows the quadrature phase is needed to make the ramping's analog state machines work under the I/Q input clock as the control. I should have emphasized it and will do so if I keep making the next PI talk. :)