How does a flip flop work, what is metastability and why does it have setup & hold time?

[@HennerZeller]

This is an excellent interactive simulation and visualization!

[@wallieeverest7695]

Colin's oscilloscope picture depicting the heatmap response of a flip-flop is perfect. Depending on the technology, output delays can extend more than a clock cycle. This delay is not included in the static timing analysis used for the combinatorial logic and routing. The tools assume the designer has appropriately delt with metastability (Clock-Domain-Crossing tools or best practices).

[@_azaad_]

Definitely going to be revisiting this entire video in the future. By the way, whoever came up with the Zero To ASIC synth riff did a good job with the sound design. Always love hearing it! :)

[@ZeroToASICcourse]

I made it with my pocket operator!

[@_azaad_]

@@ZeroToASICcourse if the ICs don't work, you could totally develop a career as a musician xD

[@matthewguthaus5086]

Nice Alan Turing photo in the background!

[@dosadih]

Thank you Matt for all these good vids :)

[@rameenanwar9812]

Wow very detailed information. Thanks Matt

[@noreagatube]

nice Matt!

[@paintballbob21]

You mentioned a reference book at the beginning of the video, but try as I might I can't find anything with what I'm hearing you say. Can you say which book that was?

[@ZeroToASICcourse]

Harris weste

[@FPGAcommunity]

Fantastic!