#2 TechBytes | How to create FPGA Bitstream in Vivado

#3 TechBytes | How to Compile U-Boot Bootloader from Scratch

Creating your first FPGA design in Vivado

Шекер - Қызық Times | Азат Жумадил Ансар Ильясов Шугыла Ешенова

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Кто круче, как думаешь?

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#2 TechBytes | How to create FPGA Bitstream in Vivado

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AustinTronics

AustinTronics

Күн бұрын

Пікірлер: 7

@SaiDumpala-l3p

@SaiDumpala-l3p Жыл бұрын

If their is error in bit stream generation for system verilog program by writting verilog wrapper then what should I do for generating bit stream.

@Crypto_Hodl 2 жыл бұрын

Do you sell bitstreams mate 🤔?

@AustinTronics 2 жыл бұрын

Funny you should say that. If it is a relatively simple bitstream design, I'd most likely publish how I made it on my channel and put up the src code on my GitHub. But if it's more advanced, I'd consider selling it. This has been something I've been looking into recently.

@Crypto_Hodl 2 жыл бұрын

@@AustinTronics I would like to chat to you about fpga and a possible bitstream what's the best way to message you directly ?

@AustinTronics 2 жыл бұрын

@@Crypto_Hodl Discord chat would be best. You can find the Discord invite link somewhere on my about page.

@bonfiggy5620 2 жыл бұрын

@@AustinTronics could you do a bitstream for ergo mining??

@AustinTronics 2 жыл бұрын

@@bonfiggy5620 It's proof-of-work based so it makes sense to accelerate the algorithm and it seems like the ergo market isn't oversaturated with ASICs/FPGAs...yet. They put on their website "ASIC-resistant"...I'm curious why they say that. In any case, if there is enough interest within the community, I could look into making one.

#3 TechBytes | How to Compile U-Boot Bootloader from Scratch

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