FPGA Design Tutorial (Verilog, Simulation, Implementation) - Phil's Lab

How to write simple HDL blocks (LED blink example), combine with IP blocks, create testbenches & run simulations, flash bitstreams, and configure non-volatile memory. PCBs by PCBWay www.pcbway.com
All the way from project creation to real-world demos. Featuring a custom AMD/Xilinx Spartan 7-based audio processing PCB.
[SUPPORT]
Hardware design courses: phils-lab-shop.fedevel.education
Course content: www.phils-lab.net/courses
Free trial of Altium Designer: www.altium.com/yt/philslab
Patreon: / phils94
[GIT]
github.com/pms67
[SOCIAL]
Instagram: / philslabyt
[LINKS]
Vivado: www.xilinx.com/products/desig...
Nandland Verilog Tutorials: nandland.com/learn-verilog/
[TIMESTAMPS]
00:00 Introduction
00:42 Altium Designer Free Trial
01:11 PCBWay
01:43 Hardware Design Course
02:01 System Overview
03:54 Vivado & Previous Video
04:13 Project Creation
05:13 Verilog Module Creation
07:24 (Binary) Counter
08:45 Blinky Verilog
12:03 Testbench
15:39 Simulation
18:26 Integrating IP Blocks
21:01 Constraints
22:39 Block Design HDL Wrapper
23:02 Generate Bitstream
23:22 Program Device (Volatile)
24:10 Blinky Demo
25:03 Program Flash Memory (Non-Volatile)
27:32 Boot from Flash Memory Demo
28:07 Outro

[@PhilsLab]

Note that this is a very basic introduction to give a sense of what steps are involved. I gloss over a few important details (such as synthesis, implementation, ...) for the sake of time, and being able to give a fairly concise overview. What FPGA-based/-related topics would you like to see next?

[@bobby9568]

Can you share the files? 😅

[@ishanmishra5997]

MIPI CSI-2 implementation on lattice cross link (preferably). Design considerations for MIPI signals on PCB, explanation of MIPI signal on oscilloscope, maybe a demo implementation and simulation using some simulation tool.

[@MrFaustotromba]

it would be interesting in the next video to see how to implement a comunication protocol like SPI, I2C or uart

[@alexanderquilty5705]

An in depth Advanced FPGA video? 😅 seems to be a scarce resource and everybody only scratches the surface.

[@gregorymccoy6797]

How different is an open tool chain? Have you used one?

[@xntumrfo9ivrnwf]

Thank you for making these videos. For some reason it's so hard to find good, beginner-level tutorials on FPGAs, and your content has been super helpful. Quite a step up from programming an Arduino!

[@lucas_liano]

What I like the most about this series is that it showcases an end-to-end design workflow. It starts with the development of the PCB and also includes demonstrations of HDL design and FPGA configuration ( including constraints and more). Thank you very much! This is pure gold.

[@PhilsLab]

Thank you, Lucas - I'm glad you like the format of these videos!

[@camk2552]

Thank you for these new FPGA videos they are very clear and are helping me design my own software defined radio

[@PhilsLab]

Thank you, Cam - I'm glad these vids are helpful!

[@IGobzter]

Phill, I'm an EE student going into an FPGA internship, thank you very much for all your awesome videos. One of the best, if not the best engineering channels I've seen so far on KZbin! You're a natural educator :)

[@PhilsLab]

Mange tak, Kasper - thanks for watching :)

[@MultiPtest]

Thanks so much for the valuable lessons and I appreciate Altium supporting your work :)

[@PhilsLab]

Thank you very much for watching, Eddie :)

[@BDSaints7]

This is excellent! Loving the FPGA content.

[@MuhammadQasimRauf]

Hmm. Nice of you to target hardware newbies as well 👍

[@PhilsLab]

Thanks, Muhammad!

[@nghiahuunguyen2596]

Thank you for taking the time to create such valuable content and for sharing it with the world!

[@PhilsLab]

Thank you for watching!

[@abhishekpratap4552]

this video taught me more than my full semester lab classes

[@DominicClifton]

Awesome straight-to-the-point video, very clearly explained, excellent!

[@PhilsLab]

Thank you, Dominic - awesome to see you follow the channel! I'm not sure if you're still developing Cleanflight, but if you're ever interested in having a chat about your work, I'd be delighted to have you on the channel.

[@MegaTraxxas]

Great tutorial, thanks for sharing your knowledge

[@rallymax2]

Very nice job Phil. Looking forward to the next video.

[@PhilsLab]

Thank you!

[@JIeFu-ee4xk]

Thanks a lot for such a detialed video. I helps me a lot to undertand the basic FPGA flow~

[@jmass1934]

Hi Phil ! Thanks for all your videos ! I'm an FPGA designer and it's great to see fairly consise and good explanantions of devices that are a bit complex ! I'm really interested in your zettbrett thought... Planning to do my own as a SoM at home ahah (Not an expert in PCB design & layout yet :P) Cheers !

[@PhilsLab]

Thank you very much - glad to hear you approve! Good luck with your own SoM design! :)

[@kiranshila]

It would be great to see a video like this but all with open source tools. For example, a design with a Lattice FPGA, Yosys + nextpnr for the gateware toolflow and layout in KiCAD.

[@PhilsLab]

I'll be making a Lattice design soon :)

[@fanshengshi1505]

your videos are extremely high quality. I wish you all the best :-)

[@PhilsLab]

Thank you very much!

[@deepakchikne6751]

Nice and great presentation!

[@PhilsLab]

Thank you!

[@Jonas_Meyer]

So many greate video its almost hard for me to catch up. Thank you really love the more "advanced" stuff.

[@PhilsLab]

Thank you, Jonas! Haha yeah I've been publishing in short succession this month, as I was away for part of it.

[@mikehibbett3301]

Just curious, why are you masking id's on some of the chips?

[@user-wq7ps8bv9i]

Good job! Maybe a video about what is synthesis and implementation? And also, can i view ful schematic for this board or it is private?

[@PhilsLab]

Thank you! Yes, a video on that is to come. I'll also be making a design walkthrough vid, where're you'll get to see the full schematic.

[@hectorvidales876]

Thank you!

[@PhilsLab]

Thanks for watching, Hector!

[@jonelectronics510]

Hi Phil, do you have an opinion on whether one should concentrate on Verilog or VHDL? I have always used VHDL in the past but that was chosen for me.

[@PhilsLab]

Hi Jon, We used VHDL at uni as well. To be honest, I don't really have a strong opinion on either language, but find I've gravitated more to Verilog. It seems a tad cleaner to me, with less to write (which can be a bad thing in certain cases..).

[@Thats_Mr_Random_Person_to_you]

Interested why the FPGA was partially scrubbed on the top of the package? Did you do that or did it come like that and what is the 'point' (I know some companies scrub as a way to preserve IP / reverse engineering, but then leave debug headers/pads on the boars that can be used to identify the chip....)?

[@PhilsLab]

Just copying the comment from 'd. timber' on the previous FPGA + microcontroller video: "Lot code and QR code are removed so that Xilinx isn't able to trace back the parts to the official distributor. This is done because Xilinx forbids the selling to Europe and USA for asian distributors by contract. It's likely that these parts were sold to "end customers" which then remove the tracebility info from the part and then sell those parts to companies like LCSC/JLCPCB"

[@PCBWay]

That's the one with Elaine's fingerprints on it!!

[@liweilin6649]

I would like to see some uart or SPI communication case🎉.

[@shakaibsafvi97]

@Phil: Very nicely done. As always... Schematic and PCB file please.... :'(

[@muratkoptur]

Thanks for the video! Can you make a video about cheap aliexpress' fpga's? They seems useful for learning projects.

[@PhilsLab]

Thanks for watching! What specific FPGAs do you have in mind? Do you have an example part number?

[@DominicClifton]

@@PhilsLab ICE40LP384-SG32, ICE5LP4K-SG48ITR

[@valentingomez4546]

In the constraints it warns me that pins G1, A2 and R12 are an invalid specification for objects? How can I solve that?

[@sumanrajkandel1453]

Text Classification on FPGA. Is this possible?? I'm trying to run resume classification using the 1D-CNN method. I can easily do the Python coding for that but, I'm skeptical about running this on FPGA. Can anyone suggest resources (documentation, code, or any material related) for this project? I will be running this on the PYNQ-Z2 board. Is there any IP block for this or how can I make it?? Your suggestions will be highly valued.

[@pete3897]

Why is it that on other channels I can select 1440p HD (or even higher) on my free You Tube account, whereas on Phil's Lab to go anything higher than standard 1080 I have to pay for You Tube Premium? Is that because of the way it's encoded, or is that a monetisation thing?

[@PhilsLab]

I'm afraid I only record in 1080 - so I"m not sure why KZbin is even offering that, unless they're doing some odd 'upscaling'.

[@tamaseduard5145]

👍🙏❤