7. TTL (Transistor -Transistor Logic) Circuit | Digital Logic Families | TECH GURUKUL By Dinesh Arya

[@aijazali3155]

after watching ur lecture,sir i become fan of u great lecture and also way of deliverance

[@TechGurukul]

Thanks for your appreciation 🌹 💐 😊

[@hasanmahmood30]

Thank u sir and love from Bangladesh.

[@archanaupadhyay3634]

Nice explanation sir n thanks for these videos rare on u tube....

[@Rakhi1888-h8p]

Sir your all the lactures are very useful and helpful for us....thanku so much sir ji🙏🙏🙏

[@bushraaziz8259]

Thanks sir for understanding this complicated topic

[@Mahashree1014]

very nice explanation .... Thank you sir from Gujarat..

[@mdfaizan1887]

Great lectures ! To the point and clear .

[@areeshakhalid7254]

You are great very nice explanation.

[@gooddeedmusic108]

Great explanation sir, understood everything perfectly!, Thank you :)

[@sanskrutithorat8701]

Thank u sir ..all concepts are cleared now

[@TechGurukul]

Welcome 🌹💐

[@kushaldev8953]

Such nice explanation thanku sir

[@jasminekaur3030]

Very nice n easy explanation sir....It’s a request sir make video lectures on ECL logic family and MOS logic family as I have done every digital logic family with good basics from ur videos ,I want to learn about these topics from you..Thank u Sir 🙏

[@nehaahuja3974]

thx alot sir

[@abdulikram7248]

Super explaination sir Dont think about the dislikes

[@iamra2u]

very good explanation Sir.

[@mohitsaini9878]

Thank u sir ☺☺☺

[@Q4Curiosity]

Thank you sir ❤️🙏

[@TechGurukul]

Welcome

[@rajeshwarithakur9900]

Thanks a lot sir . Your videos are easy language and easily understandable .please make videos on analog communication also .we are waiting for more videos

[@kanikamalik3595]

Thank you sir

[@nithyavr7754]

Thank you thank you thank you sir.. I was very confused with this topic

[@Rahulsharma-wj1rd]

Nice lecture

[@35tareenayadav97]

thanku thanku thanku thanku thanku thanku sir🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻🙇🏻

[@theneutral5831]

Your explanation is interesting. Thank you.

[@swarupray9143]

Transmiter ki range par kuch bataye

[@girikgarg1268]

Very nice

[@folk.haryanvi]

sir please provide PDF for quick revision else you are simply awesome.

[@TechGurukul]

Done.

[@mohammedjunaidmohammedjuna4283]

Sir upto now you didn't share notes in your channel

[@ClassgoEducation]

Nice Content.

[@altair6218]

I don't understand how does the collector junction of T1 gets reverse biased?

[@educationplanet192]

Mai bhi isi me confused ho raha hun

[@sooryanshsingh2957]

Same doubt.

[@hariprasadgowdakerenadka8450]

Having more doubt

[@bestoftheinternet7672]

Same doubt

[@deepakmaharshi4205]

जब हाई होगा इसका अर्थ है पॉजिटिव होगा npn के कारण जब नेगेटिव को पॉजिटिव तो rb होगा

[@nirajsharma68834]

❤Gem!

[@mrfrontend1]

❤️🔥🔥

[@souravjha2146]

nice ideo sir

[@PUBGPUBG-eb7xw]

How?? When all inputs are logic 1 then why E.B junction is in R.B and B.C junction is in F.B .

[@EVB_PRINCESHARMA]

Done

[@putlurusowjanya2663]

May I know d Importance of multi emittter transistor and d difference between normal transistor and multi emittor transistor

[@agrakshimehta6733]

to give multiple inputs

[@vijjuahir5501]

Sir dl aur dtl ko bi batio

[@hariprasadgowdakerenadka8450]

When we give all input logic 1 the transistor T1 will turned ON then the current will flow from collector to emitter then base current of transistor T2 will flow out of base through collector of T1 right,then how T2 turned ON, please clarify..

[@HarshaDwivedi33]

So sir teached right or wrong

[@amarjitrazz3696]

Sir, one query from my side how TTL first transistor emitter acts as forward biased and collector reversed and again you have told it will work as emitter reverse and collector forward . Please tell how this works.

[@rishabhgoyal1151]

same doubt plz someone,if know,give answer to the ques 😕

[@geetamehara2798]

Same doubt

[@siddharth.chandani]

He is saying in all his videos that "if you have any query then comment it down" But no one is bother to resolve it.. 😒

[@dikshayadav852]

first emitter is forward biased due to low input and collector emitter reversed biased due to voltage 0.9 which come from saturation current 0.2and conducting state 0.7 .

[@crackit5227]

Sir we need CMOS open drain and tristate o/p

[@abhishekkumargupta5221]

Emitter logic me input n hota hai ya 60 hota hai

[@MDIRFANULISLAMKHAN]

tnx sir

[@abhishekjaiswal2796]

How to know when diode is fb &Rb please tell me sir

[@TechGurukul]

Please go through video on diodes from play list of analog electronics. Diode ki bhi video Hai

[@ektakushwaha8379]

sir transistor me hum kbhi kbhi saturation ke liye 0.2 lete h or kbhi 0.8 aisa ku

[@TechGurukul]

No. Only 0.2 v for saturation

[@ektakushwaha8379]

Tech Gurukul bt sir kuch books me dono diya hua h jisse confusion ho rhi

[@debidattamohanty6771]

Sir if we remove the T3 transistor and connect our out put between Rc2 and T2 then logically we too get the same out put as previous. Would you please explain why we need the T3 transistor . Thank you.

[@RaviSharma-nb6zb]

For reducing noise marign

[@vkgamer9305]

Fir vo har bar active lo dega because vha us par m low resistance create hoga to current will always flow from there

[@aartimehandiratta113]

What is high impedance and low impedance

[@daddyji8150]

Sir diode isn't added before the output

[@naynikayadav7896]

Plz provide IIL logic

[@nilumadhukar9282]

Sir ji mujhe ecl ka study bata do na please sir

[@rahuldhakar9305]

Sir aur baki ka bhi bna do video

[@TechGurukul]

OK. Very soon.

[@deepakmaharshi4205]

आजकल आप वीडियो नहीं बनाते हो क्या

[@ektakushwaha8379]

sir ttl ka fanout dtl or rtl ke comparison me jada ku aata h

[@TechGurukul]

Ekta Kushwaha Fan out depends on max. Collector current of output transistor. So in TTL it is more. So fan out of TTL is more

[@ektakushwaha8379]

Tech Gurukul thanq sir

[@abhinaysah7285]

Sir ,pls provide pdf of the video.

[@putlurusowjanya2663]

But here above d truth table u have written basic gate Nand gate!

[@nehanishad9646]

Sir ttl me nand gate Kha hota h

[@bajradeeponsaha2076]

how to implement 2 input OR gate using TTL?

[@abdulkhaliqiqbalsubhani3076]

So we cant really change RC3??

[@SaurabhKumar-gc1ko]

how is collector base reverse biased?@ 03:29

[@educationplanet192]

Mujhe khud isme confusion hai

[@theunlimitedfunshow1039]

Hello sir.. Agar kisi circuit ka digram chahiye hoto kounsi website par jaaye

[@TechGurukul]

google pe likh do. aa jayega

[@TechGurukul]

otherwise book you can consult for digital electronics is Modern Digital Electronics by R.P.Jain.

[@AnoNymous-po5sx]

Sir, why did you take logic 0 as 0.2V Vce(sat)? Why not connect it to ground? And I want to know why you mentioned Vce(sat). Please help. Thank You! :) Sir, could you make a video of problem on TTL Analysis? I couldn't find a single video anywhere analysing the circuit.

[@Rahulsharma-wj1rd]

Hello

[@Telugu_Vlogs_Off]

Why there r no subscribers

[@abhramshaikh6905]

VIT se kon-kon hai😂😂

[@mdsaifhussainiqbal2236]

We use 4 transistor in TTL

[@TechGurukul]

You can use 2,3,4........ as per requirement. How many input gate you have been asked to draw.

[@Hector0]

Ughh they all start in English then smh

[@newfashionreview76]

Tit

[@MR.AKSHAYNETAM]

Sir aapko samjhana ni aata Thora practice kro 😂

[@fanclubthomasbreezy5656]

English please!!!😐 I didn't understand anything at all.

[@pardeepkalas8018]

When all three inputs are zero ghen how output is high???

[@prateeksharma4487]

Thank you sir

[@wifitechnicaladda8320]

Thanks sir ji

[@sonu7642]

Thankyou so much

[@samir7035]

Thank u sir ❤️

[@MantuKumar-fs9yw]

Thanks you sir

[@shivanisharma1069]

Thank you sir