Accelerate RISC-V development with Tessent UltraSight-V

Presenter - Dr. Francisca Tan
Product Manager, Tessent Embedded Analytics |
Accelerate RISC-V Development with Tessent UltraSight-V, a new RISC-V solution from Tessent Embedded Analytics.
Tessent UltraSight-V, is an end-to-end solution consisting of embedded IP and software designed to provide comprehensive, efficient debugging and trace capabilities that integrates with industry standard tools to further empower embedded software engineers in developing high-performance embedded software.
The integration of Tessent UltraSight-V on-chip IP modules and host software empowers engineers to efficiently diagnose the root causes of unexpected behavior and underperformance.
Utilizing effective, non-intrusive techniques such as encoded processor trace based on the Efficient Trace (E-trace) standard, logging, high-speed interfaces (USB 2.0) and DMA for fast code uploads, this solution minimizes debugging delays and accelerates SoC projects, to help ensure they meet their market deadlines.
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ABOUT TESSENT SILICON LIFEYCYCLE SOLUTIONS
Tessent Silicon Lifecycle Solutions is a division of Siemens EDA (Siemens Digital Industries Software).
Tessent are widely recognized as the industry market leader in delivering design augmentation and linked applications that detect, mitigate and eliminate risks throughout the IC lifecycle. Tessent solutions help customers address their debug, test, yield, safety, security and optimization requirements for today’s most complex SoCs.
Tessent solutions fall into 2 key categories, Tessent Test and Tessent Embedded Analytics.
TESSENT TEST | Design for Test (DFT) and Yield Learning
DFT and yield learning products for logic, memory and mixed-signal devices.
The Tessent Test product suite provides comprehensive silicon test and yield learning applications that addresses the challenges of manufacturing test, debug, and yield ramp.
TESSENT EMBEDDED ANALYTICS | SoC Debug and Analytics
Tessent Embedded Analytics provides solutions for real-time debug and post-deployment analytics for RISC-V-based and other complex SoCs.
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LEARN MORE
Visit the Tessent website: eda.sw.siemens...
Email: [e-mail]
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