Asynchronous Counters (Ripple Counters) Explained | Binary Up/Down Ripple Counters

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Күн бұрын

In this video, Binary Up/Down Ripple Counters (working, circuit diagram and Timing diagram) has been explained in detail.
The following topics have been covered in the video:
0:00 Introduction
1:14 2-bit Up/Down Ripple Counters (using negative edge triggered FFs)
9:44 2-bit Up/Down Ripple Counters (using positive edge triggered FFs)
13:33 Ripple Counters using D Flip-Flops and T Flip-Flops
15:22 3-bit and 4-bit Ripple Counters
Check this playlist for more videos on Digital Electronics,
• Digital Electronics
Asynchronous Counters:
In Asynchronous counters, only one flip-flop in the counter circuit receives the clock, and the output of that flip-flop is connected to the clock input of the next flip-flop.
The flip-flop which receives the external clock input represents the LSB of the count, and the Flip-flop which receives the clock input at the last in the sequence represents the MSB of the count.
The asynchronous counters also known as the Ripple Counters. The counters which counts in the binary number sequence are known as Binary Counters.
In this video, the circuit diagram, working and the timing diagram of binary up/down Ripple Counters
have been explained in detail.
This video will be helpful to all the students of science and engineering in understanding the Binary Up/Down Ripple Counters.
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Пікірлер: 31

@ALLABOUTELECTRONICS Жыл бұрын

For more videos on Digital Electronics, check this playlist: bit.ly/31gBwMa

@alaapjagdale4717 10 ай бұрын

Sir, great videos... Much helpful 🙂

@poojashah6183 Жыл бұрын

Really nice explanation

@mayurshah9131 Жыл бұрын

Very well explained

@mostafayounes9490 Жыл бұрын

Thank You❤

@shilpapatel793 Жыл бұрын

Very nice 👌👍🙏

@electronicslecturesbygulsh3799 Жыл бұрын

excellent lect

@Qscreator Жыл бұрын

hello, nice explain

@khaled-dk2ve 6 ай бұрын

شكرا على الترجمة بالعربية❤❤❤

@Ansh_Sharma26 9 ай бұрын

15:14 sir i have a question, we have given Q' of first d ff to next d ff, so its the whole circuit be down ff?

@ALLABOUTELECTRONICS 9 ай бұрын

No it is still up counter. If you closely observe, here the flip-flops are positive edge triggered flip-flops. At 1:44, the flip-flops which we have discussed were the negative edge triggered flip-flops. That's why, The Q output was given to the next state. I hope, it will clear your doubt.

@sodiumchloride17 Жыл бұрын

nice sir

@user-jq1gx1id1k 2 ай бұрын

helpful

@santhoshinisantu6047 Жыл бұрын

can you show the 3 bit ripple down counter with negative edge triggering

@ALLABOUTELECTRONICS Жыл бұрын

2 bit down counter using negative edge triggering is already covered in the video. (See the chapters in the video). You just need to add one more stage in the configuration for 3 bit counter.

@cck1496 Жыл бұрын

Excellent information.... Being a mechanical engineer, which book would you advice for grasping the concept from beginner to the expert level? Also, by just understanding your videos, do we need any book or are your videos sufficient? Thanks. Thanks.

@ALLABOUTELECTRONICS Жыл бұрын

Hi, if you want to learn the basics of electronics, then you may refer this book. Electronics Principles by Albert Paul Malvino It is a good book for understanding the basics. Along with the book, you can also refer the basic electronics playlist on the channel. Here is the link for that playlist: kzbin.info/aero/PLwjK_iyK4LLCAN5TddEZyliChEMpF0oOL

@cck1496 Жыл бұрын

@@ALLABOUTELECTRONICS Thanks for your kind reply. Keep it up...

@AffanShaikh-fw1hp 3 ай бұрын

Wht is meant by transition in yhe output of flip flop? As u said in 2:17.

@ALLABOUTELECTRONICS 3 ай бұрын

If you closely observe the circuit, then the output of the first flip-flop is connected to the clock of the second flip-flop. And the flip-flops are edge-triggered. So, they will respond to the input whenever there is a transition in the clock. (When Clock goes from high to low and low to high). So, here the second flip-flop will respond whenever there is a transition in the clock signal. And it will happen whenever there is a change in the output of the first flip-flop. In other words, whenever there is a high-to-low transition in the output of the first flip-flop. The same is also evident from the timing diagram at 4:46.

@mashfiqnaushad2033 Ай бұрын

Need correction, few things were explained wrong here. for the down counter we need to take the clock pulse from the Q to the other ffs. and for the up counter we need to take the clock pulse from Q(bar) to the other ffs.

@ALLABOUTELECTRONICS Ай бұрын

It depends whether the flip-flop is positive edge triggered or negative edge triggered. I think you haven't watched entire video. At 12:38, I have already provided table for the connection for both positive as well as negative edge triggered flip-flop. And its humble request, please do not misguide others before fact checking. Don't get me wrong, I do appreciate if someone finds genuine mistake, as it is helpful to the viewers. But some times such comments misguides viewers, especially those who are watching the video just one night before the exam, where they do not have time to check the facts.