Analog to Digital Converter: Single Slope and Dual Slope ADC Explained

In this video, the working of Dual Slope and Single Slope Integrating ADC is explained.
By watching this video, you will learn the following topics:
0:25 Dual-Slope ADC advantages and limitations
1:18 Working of Single Slope ADC
5:04 Limitations of Single Slope ADC
6:32 Working of Dual-Slope ADC
14:00 Conversion Time of Dual-Slope ADC
The Single and Dual Slope ADC:
These ADCs are integrating type ADC, meaning that they use the integrator for the conversion.
The Dual-Slope ADC provides good accuracy and high resolution
but it has sloe conversion time.
That's why it is not used for the data-acquisition, but due to its good accuracy and high resolution, it is used in the measurement instruments, particularly in the digital multimeters.
In this video, the working of Single slope and Dual slope ADC is explained in detail.
The link to the other useful related video:
1) Introduction to ADC and DAC
• Introduction to ADC an...
2) Op-amp as Comparator
• Comparator Explained (...
3) Op-amp as Integrator
• Op-Amp Integrator (wit...
This video will be helpful to all the students of science and engineering in understanding the working of Single and Dual Slope ADC.
#DualSlopeADC
#SingleSlopeADC
#IntegratingADC
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[@congngolao843]

far better than my lecturers.I learn so much more with you in 20 min more than 2 hours in his class.Thank you so much

[@ALLABOUTELECTRONICS]

The timestamps for the different topics covered in the video: 0:25 Dual-Slope ADC advantages and limitations 1:18 Working of Single Slope ADC 5:04 Limitations of Single Slope ADC 6:32 Working of Dual-Slope ADC 14:00 Conversion Time of Dual-Slope ADC

[@utsavv1167]

The most concise and well explained video I've ever seen covering basics to higher level. Thank you so much!!!

[@SouravBagchigoogleplus]

This is the perfect explanation of ADC. You have cleared my doubts. All other ADC videos are trash.

[@vidhanmaheshwari2082]

Couldn't be more precise. Thanks a lot for explaining. This channel is my go to guide for any basic doubts in analog electronics.

[@philiporlando616]

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[@zaidendemetrius331]

@Philip Orlando Instablaster ;)

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[@zaidendemetrius331]

@Philip Orlando you are welcome xD

[@iconicstudies4u]

I've cleared my all doubts from this video.. Thankuu so much sir. 🙏

[@nthumara6288]

thank you sir this is really helpful my exam will be on couple of dayss and i wathed alsost all vidios on the topic but thats where i undestood the topic very clearly

[@sharansiva7635]

I finally understand this topic. and my exam is in a couple days, thank you!

[@ALLABOUTELECTRONICS]

Good luck for the exam.

[@rishabhbansal6138]

One of best vedio for understanding dual slop ADC

[@nityarajan9323]

this legitimately blew my mind instead of blowing my head off like in class

[@RAVICHANDERB]

Fantastic explanation i read two to three books before seeing this video. great explanation...

[@saumyapandey2270]

After watching this video all doubts are cleared Very well explained sir Thanku so much

[@amanjonathanprakash1044]

thanks for the crystal clear explanation

[@naveenh8075]

Thank you boss, it was very useful for understanding it for my college seminar topic XD

[@amsavallia2020]

Dear sir Ur class is easier understand

[@kousikmullapudi5126]

Thank you so much sir you made us to understand this topic very easily😁

[@flyingbirds6794]

Thank you very much, this is an excellent video!!

[@farhanupaul]

Why is the input signal getting integrated for 2^n, shouldn't it get integrated for 2^n-1?

[@ee_57_shantanushukla35]

The counter will count from 0 to 2^N-1, implying that total count would be 2^N (for example for 0 to 3 total count is 4)

[@hakanozturk7442]

Thank you so much for this video. You told this subject very clearly.

[@adrijaraychaudhuri4257]

Your name sounds Turkish?

[@user-xe1lx1pg9q]

Very well explained 👍🏼

[@vitalram1985]

Excellent 👌 explanation. Good command over the concepts.

[@rinukabhadreskumar1196]

Very nice.. I see first video which is completely explaining the whole process

[@doormanagementcounts5518]

Thanks for your support for sem

[@nayabakhtar5636]

crystal crisp clear

[@binhduongcao2001]

Thank you so much for your brilliant explanation !!

[@KarlA-vk4kn]

Well explained 👏 👌 👍

[@manojks8839]

I appreciate the explanation of this video, but you never mentioned anything about the switch across the capacitor? please do mention about it. Thanks

[@sunandak71]

Wow, such a simple explanation. Quality content it is. Thankyou ! ☺️

[@swethachiliveri853]

Thank you for the lecture. I appreciate your efforts. For T2=N*Tc where you meant N is some output from the counter that could be between 0-2^N-1. Here, the notation 'N' is confusing. Suppose, for 5-bit Dual Slope ADC N is 5. That means, T2 is 5 Tc cycles? This could have been something more better.

[@ALLABOUTELECTRONICS]

Yes, I should have used different nomenclature for both to avoid the confusion .

[@swethachiliveri853]

@@ALLABOUTELECTRONICS Thank you for replying.

[@gprabhakarreddy4245]

Hello sir can you please made videos on the topic of digital modulations I.e, pulse code, delta modulation, adaptive delta modulation.... Please sir....

[@nthumara6288]

sir can you make a vidio serires about pid controllers plz sir it is really nessesry

[@trevor062]

That explains it. But how to convert to the digital output? Any examples?

[@ALLABOUTELECTRONICS]

Please check this playlist. Some examples are also covered. kzbin.info/aero/PLwjK_iyK4LLCnW-df-_53d-6yYrGb9zZc

[@electrowizards1355]

Aaj to concept hi clear ho gaya.......

[@mayurshah9131]

Excellent 👌👍

[@Nishitosh06]

Well explained sir

[@jaforikbal6388]

amazing

[@ShreyasBharadwaj]

The Dual slope example is quoted for Vmax of the ADC range. A fixed time period sampling of Vin with counter effective on T2 slope only will make the operation more practical. Otherwise an excellent video.

[@ALLABOUTELECTRONICS]

The time duration for the input voltage is always fixed. The input signal will be integrated until the counter reaches (2^N -1). So, the time duration for Vin is fixed only.

[@indureddy1218]

Superb explaination sir

[@sakthivel-yq5gq]

Thank you for this wonderful vedios sir

[@rinukabhadreskumar1196]

Explain .. when counter overflow occurs ,it switched the input via flipflop

[@fanz6962]

why should the reference voltage be integrated? before giving it as input to the comparator in single slope ADC

[@guvugjrhv]

great video thanks

[@dhruthisaripalli9999]

Sir can you please explain how the conversion time has become 0.8ms at 15:36sec

[@ALLABOUTELECTRONICS]

Its 2^(12+1)/ 10 MHz

[@mirovskii]

I couldnt understand the relation between the positive slope of the integrated output and the negative sign of the reference voltage. Why we said that the slope is positive because of the negative Vref? At the time 2.13 in the video.

[@nthumara6288]

go and watch integrater vidio

[@srilathamupparaju8576]

How to switching the switch from vin to vref and can you plz give a small example on dual slop adc can plz take vin is some value and vref is some value and output will be analog form

[@ALLABOUTELECTRONICS]

Will cover this type of example very soon on the second channel.

[@Chiru12343]

Thank U Sir....👍🙂

[@er.parmeetrooprai5254]

effect of input offset of the comparator on the opeartion can u explain

[@chetanpatidar1562]

If my exam question ask me to "explain dual slope dvm" so can I explain "dual slope ADC"? Means are both the terms synonym of each other or if there is any difference,then tell me the difference. 🙏🙏

[@ALLABOUTELECTRONICS]

Yes you can write, as it works on the same principle.

[@khypex9923]

Adam Bruder, hast wie ein Löwe geredet, hamdulilah hab alles verstanden, möge Allah dich rechtleiten und deine Sünden vergeben AMIN

[@t.mahipalreddy5893]

I didnt get u at switch is closed What happens??why we use switch over their??

[@ajazamin9843]

the circuit is reset before conversion after switching on the input voltage is selected and integrated over a period determined by RC time constant and a certain voltage output is obtained for a certain time period than switch is moved to select the reference voltage. as reference voltage is negative below zero it is integrated over time period till the output of integrator becomes zero

[@kshitijyadav9101]

can you also provide the slides which you are using

[@ajazamin9843]

sir at 10:30 do u mean that second slope that is slope at T2'' will remain parallel to slopes at T2' and T2

[@srilathamupparaju8576]

If my vref is 2 and my vin is 5 how to work single slop can you plz explain

[@RajkumarMahto-id1ve]

What is the conversion time of single slope ADC

[@ALLABOUTELECTRONICS]

As I mentioned at 3:12, the conversion time of single slope ADC is (RC x Vin / Vref)

[@shafiabid2522]

Shouldn't be the output of the integrator be positive when -Vref is applied?

[@ALLABOUTELECTRONICS]

Yes, it is positive. Please check at 2:23.

[@shafiabid2522]

But at 12:58 it says that the output of the integrator is still negative. Why?

[@sankitbhimani]

best explanation bro❤ but little suggestion to you that please share your lecture notes also for remembering all this things😅

[@ALLABOUTELECTRONICS]

Yes, I have got so many requests for the notes. And very soon will provide the notes for all the topics. Some of the notes have been updated on the website. For more info, please visit: www.allaboutelectronics.org

[@Rita-eh5un]

Good video! Keep up!

[@jamesmazarello4625]

Can anyone help me with the design of both positive and negative signal, from DC to 500 Hz using IVC102

[@fitwithprathamYT]

Little correction 8:00 (after time t2)

[@punitakumari187]

Sir,in dual slope adc vin is unknown and we are integrating for fixed period of time ..so how counter will start count from 0000 to 1111 means 2^n-1? Bcz overflow become high when count exceeds from 1111.

[@ALLABOUTELECTRONICS]

Once the overflow bit becomes high during the time T1, the counter will get reset to 0000. That means during the time T2, it will start from 0000. I hope, it will clear your doubt.

[@thevitruvianman9781]

Does Vref have to be fed to inverting input? If yes, then why?

[@ALLABOUTELECTRONICS]

Yes, with that you will get the second slope. Please watch from 6:32 onwards, you will get it.

[@tejeshkumar6091]

I think we have to connect T-flip flop after counter ....for toggling when the output of counter -1111..🤔

[@mounikamouni8297]

yes

[@srilathamupparaju8576]

Why we use integrator. normal counter type we don't use Any integrator so can you plz explain important of that integrator in this circuit

[@ALLABOUTELECTRONICS]

The different types of ADC use, different types of techniques for the conversion. The dual-slope ADC does not require any DAC for the conversion. (Unlike Counter type ADC) and it provides a good resolution. So, it is relatively cheap compared to other types of ADCs for the same resolution. And mostly it is found in the Digital Multimeters.

[@srilathamupparaju8576]

@@ALLABOUTELECTRONICS Can you plz give a small example on single slop asc

[@priyankasiwach5066]

1:54 ,Why the reference voltage is integrated untill Vo=Vin?

[@ALLABOUTELECTRONICS]

As soon as the output of the integrator crosses the Vin, the output of the comparator becomes low. And further counting will stop. (As mentioned at 4:53) . And the integrator capacitor will get RESET. I hope it will clear your doubt.

[@theartofelectronics3348]

Hello sir , please made on video sigma delta ADC .

[@ALLABOUTELECTRONICS]

Yes, will also try to make video on it.

[@KarlNgn]

Can someone explain why T2 = N*Tc ?

[@Nightfuri-g3m]

6:34 dual slope ADC

[@farhanupaul]

Is the Vref also an AC signal with same frequency as Vin?

[@ALLABOUTELECTRONICS]

No, it's DC VOLTAGE. And it should be very stable.

[@farhanupaul]

@@ALLABOUTELECTRONICS But Vin is AC, and it will change polarity. So what will happen when negative cycle starts?

[@ALLABOUTELECTRONICS]

When ADC is used with only positive reference voltage then we need to ensure that, the input is positive only. If input is time varying or AC, then we need to provide the DC offset to ensure that it is positive. But some ADCs can be configured in the differential mode. And in such case, input can be applied from - Vref/2 to + Vref/2.

[@justadreamerforgood69]

@@ALLABOUTELECTRONICS But here the reference voltage is negative and not positive

[@archanasingh-wp4sv]

Bc of this written words most of the time diagrams and equation can't be seen.please take care of this rhing

[@ALLABOUTELECTRONICS]

If required, you can turn off the subtitles manually in the video settings.

[@chandran-youtube]

tq

[@madhurimareddyg9691]

Sir you are going so speedly. Please try to reduce the speed.

[@venugopalganesh2974]

but I see the video at 2X speed!

[@aryanhussain8261]

bhai tere words samajh nhi aa rahe

[@sreevanikanala63]

Do the video on cascode

[@gprabhakarreddy4245]

Haaa do it

[@shaurya5harma]

how T2 is N*Tc?

[@ALLABOUTELECTRONICS]

Here please do not get confused with the N with n-bit counter. N is the count value of the counter. n is the number of bits of the counter. I should have used different N for both n-bit counter and count value. That means T1= 2^n X Tc and T2 = N x Tc. I hope, it will clear your doubt.

[@TARGET_TI]

@3:12 how output of integrator Vo comes to Vin..in time T, bcoz as per input we only applied Vref

[@ALLABOUTELECTRONICS]

The input is Vref, but the output of the integrator is compared with the input of the comparator. At some T, the output of the integrator is equal to the Vin ( input of the comparator). I hope it will clear your doubt.

[@enaresh5749]

I am confused alot in this video

[@mitulnagarsvnit1836]

what is the vin ? is it sine wave or square wave?

[@ALLABOUTELECTRONICS]

Actual input to ADC system could be anything. The input to the ADC is the sampled value by the sample and hold circuit (as I mentioned in the introductory video). And SAH circuit should hold that value till the end of conversion. I hope it will clear your doubt.

[@thirstymente2699]

14:26 how T2=N*Tc

[@ALLABOUTELECTRONICS]

Its shows the n clock cycles to reach the output to zero. During T1, the integrator integrates the input voltage. T2 shows the time required by the integrator to reach to 0V. That's n clock cycles (Where n is some counter output (between 0 to 2^N -1). I hope it will clear your doubt.

[@thirstymente2699]

@@ALLABOUTELECTRONICS Thank you

[@thirstymente2699]

@@ALLABOUTELECTRONICS if possible please make a video on sigma Delta ADC( includes modulator,decimator, and current starved VCO)

[@paravadahimaja9659]

Sir how can we say that exactly n clock cycles ..It is depend upon Vref

[@raghunathsinha9685]

Not clear

[@TARGET_TI]

@2:36

[@fulufhelomatidza2868]

Best explanation ever!🫶🏽

[@adityakuricheti6653]

Well explained 👍

[@nthumara6288]

sir can you make a vidio serires about pid controllers plz sir it is really nessesry