Binary Sequence Generator using Shift Register (with Simulation) | Digital Electronics

[@ALLABOUTELECTRONICS]

For more videos on Digital Electronics, check this playlist: bit.ly/31gBwMa

[@poojashah6183]

The most rare video on online sites and you explained it amazingly, thank you so much 👌🏻👌🏻👍🏻

[@Ritam_404]

Watching this 1.5x is different feeling 😌

[@bharathk8320]

thank you bro ...I am watching your videos since i joined college....EEE,EIE,DSD

[@mayurshah9131]

Just superb

[@smvlogs7878]

which simulation tool is used in this video??

[@ALLABOUTELECTRONICS]

Deeds circuit simulator

[@nileshdesai5218]

op man

[@KandhanM-n1o]

sir for kmap for function f how we use dont care terms

[@ALLABOUTELECTRONICS]

I have already shown in examples 1 and 2, how the don’t care terms can be used to minimise the expression.

[@ecehero_yadav_777]

pulse train generator kya hota hai

[@bhavyatanneru3571]

can you pls share the code you used for simulation here?

[@ALLABOUTELECTRONICS]

It is same as the code used in example 1.

[@husseinkj1269]

How solve this using T flip flop

[@ALLABOUTELECTRONICS]

You need to convert T flip-flop in D flip-flop (using XOR gate). Here is the link for the conversion: kzbin.info/www/bejne/n3KomJirftR4eLM

[@husseinkj1269]

@@ALLABOUTELECTRONICS ok but what the value of the input d

[@ALLABOUTELECTRONICS]

@@husseinkj1269Like here (using D flip-flop in the video), the output of one flip-flop is connected to input of the next stage. So, in that case, also , the output of the previous state can be connected to the one input of XOR gate. I hope, it will clear your doubt.

[@husseinkj1269]

@@ALLABOUTELECTRONICS yes i did it in multisim but the result different in T flip flop i hope to communicate with you to send the picture if you have a time