CNFET Standard Ternary Inverter (STI) in Cadence Virtuoso.

  Рет қаралды 271

Dr.HariPrasad Naik Bhattu

Dr.HariPrasad Naik Bhattu

Күн бұрын

Пікірлер: 22
@burleramprasad9404
@burleramprasad9404 2 ай бұрын
Sir please make a video on how to calculate read and write power in 12t SRAM
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu Ай бұрын
Hi, Need some time to do that.
@TungGisAup
@TungGisAup 12 күн бұрын
sir can we do layout and RC extraction on the above circuit ?
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu 11 күн бұрын
Hi, cntfets gpdk library is not available. What I have used is a Verilog-A model
@srinivassrinii
@srinivassrinii 2 ай бұрын
sir which parameter if we vary to reduce power consumption in the CNTFET list
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu Ай бұрын
Hi, vdd can be used to achieve low power.
@srinivassrinii
@srinivassrinii 2 ай бұрын
how Do we calculate power,delay,PDP,EDP in the ternary logic
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu 2 ай бұрын
Hi, see it works kzbin.info/www/bejne/n2PcpIShobGtrpI
@srinivassrinii
@srinivassrinii 2 ай бұрын
Sir in delay calculation you have consider only one rising nd falling edge but we need to consider viceversa also na, and we need to do average of it. Am i correct? please clarify if i am wrong.
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu Ай бұрын
Hi, you are correct. I have shown only one way. Need to do average.
@srinivassrinii
@srinivassrinii 2 ай бұрын
sir by using vpwl how we can set period and pulse width , in case of AND gate how we can check all possibilities
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu 2 ай бұрын
It works for all the combinations kzbin.info/www/bejne/n2PcpIShobGtrpI
@srinivassrinii
@srinivassrinii 2 ай бұрын
@@dr.hariprasadnaikbhattu Thank u sir i will go through
@suchithareddy953
@suchithareddy953 Ай бұрын
Sir, how did you create the second source. You told we should provide the file path. If possible can you please share that pwl file sir
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu Ай бұрын
Hi, attached the pwl files drive.google.com/file/d/1auCnBZVM-VtwaTXtZn8UNx0bf15lHnrG/view?usp=sharing drive.google.com/file/d/1b4i_HnmC52CM6BEmtiWPwYCx9FUfV2Fs/view?usp=sharing
@srinivassrinii
@srinivassrinii 2 ай бұрын
can we do PVT analysis by using this verillog-A file, if so how can we do please make a video
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu 2 ай бұрын
Hi, PVT need to be verified if possible I will check it.
@srinivassrinii
@srinivassrinii 2 ай бұрын
@@dr.hariprasadnaikbhattu Thank u sir , please make a video if it is possible
@adarshsharma4055
@adarshsharma4055 2 ай бұрын
how you get cntfet in cadence
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu 2 ай бұрын
Hi, go through the link for CNTFET in Cadence kzbin.info/www/bejne/e6elZ6uNrNylqpo kzbin.info/www/bejne/nHjEkpeLfKhle9U
@BevaraSatyamnaidu-vz7wl
@BevaraSatyamnaidu-vz7wl 2 ай бұрын
Sir please make a video on how to calculate read power and wirte power in 6t SRAM
@dr.hariprasadnaikbhattu
@dr.hariprasadnaikbhattu Ай бұрын
Hi, Need some time to do that.
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