Design Sequential Circuit from State Diagram using Flip Flops and Combination Logic Gates

[@SithumSithara-hp2cg]

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[@eevibessite]

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[@SithumSithara-hp2cg]

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[@eevibessite]

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[@rahelfarhad9946]

Mam if we had to analysis the sequential circuit SR flip flop and in some way in the binary sequences i have S=1 R=1 then what should i do for A and A+? What should i put in the nexr state A+?

[@eevibessite]

We preferably do not design the sequential circuits using SR flip flop because of this undetermined state as it causes the glitch. Three types of the flip flops are used for designing sequential circuits that are: D ff Jk ff And TOGGLE FLIP FLOP.

[@rahelfarhad9946]

So u consider the unused states as dont care? So its true for both mealy and moore? Here is mealy and u considers 6 unused possibilities as dont care what if its was moore? Still be dont care?

[@eevibessite]

Yes to simplify the logic of FSM

[@rahelfarhad9946]

@eevibessite even if it's was mealy type sequence detector? Still u simply?

[@rahelfarhad9946]

Even its true for sequence detector to consider unused states as dont care?​@@eevibessite

[@Mani-wq1de]

how to design this using T, SR, JK flip flops ma'am?

[@eevibessite]

Are you asking for the same problem ? Or just want to learn the design using other FFs. ?

[@zainmalik0048]

@@eevibessite for same problem with t flipflop

[@SreepriyaDarshini]

Logic diagram eptii poturathu

[@eevibessite]

Thanks for your feedback. Please let me know if you have any specific questions about the logic diagram!