EDC Practical: 1. Design a single stage FET Amplifier in CS configuration by Prof. Omkar S. Vaidya

[@swapnagirase493]

Thanks sir ur teaching method is very nice

[@OmJoshi_111]

Good. It will help to Orel and practical exam. Tnx

[@tejasjoshi3838]

thank you so much sir your all videos helped a lot

[@xz6476]

Tysm Sir .. Keep Up The Good Work .. GBU ✌😘

[@dr.omkars.vaidya5999]

Thanks for valuable remark. Try all other EDC Video Series session for the same.

[@xz6476]

@@dr.omkars.vaidya5999 Sure Sir .. I've watched almost each and every video and I recommend the same to my classmates too .. I am really grateful to You for putting such efforts .. I really wish our Professors to teach like you do .. Making things easier .. And Yeah EDC was never interesting but now it is .. Tysm ✌

[@talhafarooqui6303]

thanks you pretty helpful...✌👌

[@tejaspund7174]

Is it compulsory to short the source and substrate ?

[@dr.omkars.vaidya5999]

Dear, In theory we have seen that substrate terminal is connected to ground always otherwise body effect will occur. And we have considered Common Source Configuration in which source terminal is connected to ground through resistor Rs. In practice we are concerned about only 3 terminals viz. source, drain and gate. Source and substrate must be equi-potential (i.e. Ground) and hence it is practice to short source and substrate.

[@sanketgadakh219]

Sir please make lecture sessions of edc. Your teaching method is nice

[@dr.omkars.vaidya5999]

Thanks for watching video. We are trying to shoot some theory videos and soon will upload the same.

[@sanketgadakh219]

sir we have to use BF245C FET so what is the difference in that

[@dr.omkars.vaidya5999]

Dear Sanket, both BF245C and BFW10 are n-channel JFET. In BF245C yos = 25 uS, IDSS = 12-25 mA, comparatively high cut-ff frequency and packaging is TO-92 (only 3 terminals available) while in BFW10 yos = 85 uS, IDSS = 8-20 mA, lower frequency transistor with TO-72 package (4 terminals available).

[@sanjaygangurde1335]

Use good camera mobile yar it's too much hard to determine where you are inserting the resistors on breadboard

[@supriyalaykar699]

Why we dont find bfw 10 in simulator of proteus

[@dr.omkars.vaidya5999]

Because all JFETs in this library are packaged for PCB design and has appropriate simulator properties. Some models are generic to particular category of transistor. The reason of choosing BFW 10 in my simulation is I have compared hardware setup (using BEW 10 NJFET) with software. I have used Multisim software for the same which you will find in other video of same EDC Practical series.

[@rohang6365]

Use multisim

[@shardulkhot6376]

Sir, please review this is my practical project question,i have to submit in 2 days.I have solved the sum ,got the components, but what next . Please sir ,your little help would be matter much.this is the ques. Design Single stage CS amplifier for FL upto 20Hz. Use JFET BFW11 to give output voltage of 2v & voltage gain lAvl =10. Design to give ID = IDs = ½ IDSS.

[@jitendratiwari8144]

Thanks a lot

[@isachinshinde21]

Thank u sir

[@suyogkangune1510]

Sir😁😍

[@mrunupawar4158]

😜😜😜😜

[@suyogkangune1510]

@@mrunupawar4158 😁

[@Vivek23_2]

👍