Domino Logic CMOS (Basics, Circuit, Number of Transistors & Working) Explained

[@EngineeringFunda]

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[@pkb8517]

PDN is made up by nmos So PUN is for pmos

[@shaikanees3657]

Yes PDN is made up of nmos

[@deathreap1014]

Yes

[@kowshikapriya2554]

Yess

[@EngineeringFunda]

PUN (Pull Up Network) made up of pMOS.

[@alloc7260]

હવે બરોબર

[@nimitgarg2531]

Yes

[@vivekreddy8765]

Thank you sir for 1 min I got mad and searching for your previous lectures

[@fasnamfd]

very usefulll video .Thank you sir

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[@lailazannat5989]

you are such an excellent teacher!

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[@gethss]

So much helpful tahnk you sir

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[@muhammadmuzamilmir4550]

Thanks sir.. very great someone has started teaching this difficult subject.. will follow all .. thanks once again.. watched ur video ..basic concepts are good❤️

[@EngineeringFunda]

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[@manojreddy3127]

Very ease of explaining thanks for the video

[@EngineeringFunda]

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[@praneethch1908]

Perfectly explained Sir

[@EngineeringFunda]

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[@Reachexamcentre]

Nice explanation sir.Thank you so much.From the name of Domino logic we can easily said the Domino's Pizza...

[@padmavathin6879]

Well explained sir. Your video helps students a lot

[@EngineeringFunda]

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[@robindethienne4253]

Nice video, thx for the explanation, from Belgium ;)

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[@Asifur_Rahman]

Thanks a lot sir for the videos of VLSI

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[@newhope5729]

Thank you so very much😇🙏

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[@newhope5729]

@@EngineeringFunda Yup I'm sharing them..... They're good 👍

[@deathreap1014]

Well explained sir thank you

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[@gyanjyotidas1451]

Thank You Sir❤❤

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[@susheelapatgar3640]

Thank you sir 🙏❤️

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[@shrutisingh5356]

Good explain 😊

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[@pritikhanpara222]

Perfect 👍👍

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[@soniyakumari2870]

Really nice👍

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[@taukirali1148]

Bhot acha laga sir

[@EngineeringFunda]

Your welcome dear 🙏

[@melamraghava6538]

Thank you 😌

[@EngineeringFunda]

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[@taukirali1148]

Thanks sir...you're very helpful ❤️

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[@sanjanakataru1086]

WHEN clk=1 and and input=0 , why did you take output as zero, bcoz when clk=1 and input=0 both pmos and nmos are off right ? how did you get the voltage before inverter as VDD, can someone please tell this ?

[@zahidabedin4268]

Nice explanation

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[@shubhamharale16]

Thanks dada

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[@jbkrobin]

10:58 How x1 will be in Vdd stage if pmos is off? x1 should be 0 here and after inversion it should be 1. So, output 1 would be 1. Right?

[@vinayanpa126]

it got charged before that cycle

[@jbkrobin]

@@vinayanpa126 Semester passed. But thanks. I will check later if needed. 😅

[@lakshyagupta4211]

Huge fan sir, thank you for this playlist 😍😍

[@EngineeringFunda]

Your positive comments motivates me. Teachers like me just wants positive comment from student. Love from you guys means a lot to me. My goal is to create largest community of engineers in entire globe. Please help me by sharing this playlist with your friends.

[@lakshyagupta4211]

Sir kindly make a video on DRC rules as I am having my paper on 3 March so it will be a huge help.

[@nileshpandey4859]

sir please make video on tspc logic in dynamic cmos

[@TechLoveMe]

Sorry to correct you, but there is wrong you explain in 1st definition " In static we use PDN by now not by pmos so correct it. I like your videos by heart,

[@EngineeringFunda]

Pull down network is made up of nMOS. And pull up Network is made of pMOS.

[@EngineeringFunda]

By mistake I have wrote PDN, it should be PUN.

[@sammikumar3474]

In video you explain about casacading effect of cmos you take input 0 0 and then 1 1 but reverse in this video why?

[@vivekKumar-o7i5n]

PDN is made up with nmos sir time -> 0:26 / 12:19

[@alabamaroaster1086]

in the case of CLK 0 and INPUT 1 had the output 1 and 2 as 0 logic.. shouldn't X1 be in 0 state and then inverted and charged up to Vdd for the case of CLK 1 and INPUT 0, for X1.

[@EngineeringFunda]

It is perfectly correct here

[@alabamaroaster1086]

@@EngineeringFunda ohk thanks a lot again

[@saranyathanukkodi7674]

Sir when we will use pseudo nmos Whether this order is correct aa sir Cmos Pseudo nmos Static cmos Dynamic cmos Domino cmos

[@EngineeringFunda]

Correct

[@saranyathanukkodi7674]

Okay sir tq . Please do the pseudo nmos and keeper circuit topic sir

[@vechamvidya4499]

Wrong... Pseudo nmos CMOS Static CMOS Dynamic CMOS Domino cmos

[@saranyathanukkodi7674]

Tq@vidhya

[@pemmakavijaykumarreddy5852]

sir does the capacitors are actually present in above domino cmos at 11.19 how the output 2 is 0. i think it would be 1 and i have 1 doubts regarding chargings and dischargings

[@EngineeringFunda]

It is not fabricated, it is happening due to circuits.

[@Diverse_insights-1]

Design 8 input MUX using two 4 input MUX in Domino logic and explain. Sir how to solve this one?

[@aniketmodi5509]

Sir can you please share your notes which you made in videos

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[@hampaa13565]

0:25 PUM-> nmos

[@yalemlake4783]

PDN is not made up of Pmos rather it made up of nmos

[@amirphilip2234]

@@yalemlake4783 Exactly 💯

[@abdurrahmanmolla1015]

If have a input 1010 how to saw the output?

[@taukirali1148]

Sir, can you please tell me how to overcome the problem of Race in domino CMOS ?

[@taukirali1148]

You've not uploaded any video regarding tht..if you've pls help me.

[@msaathreya266]

@@taukirali1148 nora

[@rancho4512]

Bhai tujhe pta ky pdha rha bol rha

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