Pass Transistor Logic Explained | How to Implement Logic Gates using Pass Transistor Logic ?

[@ALLABOUTELECTRONICS]

The other useful videos related to the topic: 1) CMOS Logic Gates Explained kzbin.info/www/bejne/nGTdg61mmZ6Ld5o 2) Multiplexer Explained | Implementation of Boolean Functions using Multiplexer kzbin.info/www/bejne/l4LPd2BvnpiZd6M 3) Logic Gates using Multiplexer kzbin.info/www/bejne/rHXbpXyfoJmpiqM

[@vishakhabhale4584]

BEST AS ALWAYS.....I LIKE YOUR WAY OF EXPLANATION AND DEPTH OF EXPLANATION

[@abhishekmaurya6562]

He also like depth

[@arnab94mallick]

Excellent explaination.

[@anirudhas-tn6ue]

The logic restoration circuit is looking very similar to transmission gate concept

[@AjinkyaMahajan]

Well explained. Thanks a lot 😄😄

[@Golukumar-vj6kk]

thank you for the great explanation.

[@poojashah6183]

Best as always 🙂

[@Imfarhanali]

Best as Always Bro, if you had already video for other topics like Tristates, Multiplexers, Latches and Flip flop can you Upload as soon as Possible i have an Exam on Tuesday. That would be great please

[@ALLABOUTELECTRONICS]

All the videos have been already covered. Please check the digital electronics playlist on the channel playlist page. You will get it.

[@Imfarhanali]

@@ALLABOUTELECTRONICS thanks but do you made any video on CMOS Fabrication Process? If yes can you upload that

[@Rezni001]

Excellent explanation, one thing I didn't understand in the example of the AND gate, if we use one inverted input of A, it requires us to use an inverter that requires 2 more transistors and then the saving is only in 2 transistors, did I understand correctly or is there another way to insert the inverted input of A?

[@ALLABOUTELECTRONICS]

Pass Transistor Logic is typically used to implement very large circuits or very large logic, where minimizing the overall size of the design is a priority. So, in such designs typically, the inputs and their complement both are available at the same time. For example, if the circuit takes 6 inputs, then all the 6 inputs and their complement will be available. Using these inputs, the further circuit is designed. So, in such case, these pass transistors based design will require less transistors and hence less area.

[@mayurshah9131]

Excellent 👍

[@Golukumar-vj6kk]

i don't get the parasitic capacitance point. let's say n no. of NMOS pass transistor logic are connected then there is (n-1) connecting node in the circuit. then this (n-1) nodes are responsible for parasitic capacitance. But in CMOS technology we have more no. of transistors (2N) then there is more no. of connecting node that means more parasitic capacitance. So, according to my understanding in terms of parasitic capacitance Pass transistor logic is good. Correct me if i am wrong with proper explanation. Thanks

[@abdulsami4607]

Thank you very much ❤

[@A_Dark_Knight]

Great explanation sir

[@yuga9511]

why the minimum value is considered? how Vs = min(Vd, Vg - Vt) occured?

[@ALLABOUTELECTRONICS]

Because as I have explained, Vs cannot go beyond Vg - Vt. When Vs = Vg - Vt, then Vgs = Vt. So, beyond that voltage of Vs, transistor will be turned off. Now, If the drain voltage is less than Vg - Vt, then source will be able to follow that. For example, if Vd = 3V, Vg = 5V and Vt = 1V, then in this case, Vg - Vt = 4V, so once the transistor is turned ON, the voltage at source can go upto Vg- Vt = 4V. But here since Vd = 3V, so at max, Vs will go upto 3V. So, in general, we can say that, Vs = min (Vd, Vg - Vt). I hope, it will clear your doubt.

[@SAhellenLily]

Thank you Sir😊

[@Satyam-gh3ys]

cant understand so confusing

[@CHENAPPADY]

MPRS 686520 AUG 2024 ❤❤❤