Exploring IBM 5100 P.A.L.M. with Steve Lewis

[@ForgottenMachines]

I'm so glad to have attended this talk in person! Such a wonderful job!

[@caggius42]

This just goes to show how much you can forget in 40+ years, and also how little of the back story I knew. Thank you. Back in the early 80's I was the one half of a team who took a 5110 and developed a circuit board tester around it - I added dual diskettes hand built from Customer Engineering (CE) spare parts and then designed an IEEE 488 adapter for it. My friend Neil, sadly no longer with us, did most of the Software extensions in APL to drive it. Despite being fairly proficient in APL at the time, nowadays I struggle to even read any of it. I used to call APL write only code as debugging other people's functions was nigh on impossible. Not much room for comments when you can write the entire program on one line.

[@DShadowWolf]

SASI is, if memory serves, "Shugart Associates Serial Interface" and was what SCSI was based on. So yeah, you got that bit right.

[@ForgottenMachines]

Looks like the Q&A was cut off at the end.

[@JohnRineyIII]

A BASIC with PICTURE clauses! How IBM-y.

[@stephanepitteloud1849]

Very interesting presentation, congrats. I'm not sure to understand what the PALM processor exactly is. If the whole board is the processor, then it's not a microprocessor as we understand it, it's more like a CPU implemented in TTL logic like on the DATAPOINT 2200, or I totally missed the deal? Thanks for the clarification :-)

[@voidstar1337]

It's a bit of a hybrid. There are some TTL support chips, but not directly for the opcodes. If it were TTL, it would be more like the Wang2200- and a much larger system (likely with a whole "external CPU"), many more boards, and needing more cooling support. Within the "silver can" chips (that I've since learned IBM referred to as "Dutchess") there is a form of microcode -- which gives the meaning of PALM: Put All Logic in Microcode. So these "Dutchess" modules are somewhat like a ROM chip (in that their programming is retained when power is taken away). There is some debate on if the internal makeup is called MOSFET or not. But like in implementing the AND opcode (0 R2 R1 5) where the last 4 bits (5) is the opcode modifier (with 0 being the opcode itself). There isn't a bunch of TTL chips to implement that across all 8 bits of a byte. I've yet to find the form of the microcode itself (and how it differs from Intels microcode), but these modules begin with a capacity of 6KB. The two large rectangular chips are a pair of 64-byte RAM, tied directly to the first 128 bytes of the system for use as a register file. To keep the physical size down they had to limit themselves on the number of opcodes - so there are 16 main opcodes (0-F) with a variety of "modifies" (the last 4 bits). So I view the PALM processor as a kind of enlarged what-became-the-microprocessor, such that each component could only be up to ~48,000 bits (6KB) instead of one contiguous square of transistors. So I suspect IBM, Fairchild, Intel were all at about the same time figuring out processes for making packages like this, some with larger/better density than others. It's like an incremental refinement to TTL - in that I suspect metal was used as opposed to ultraviolet light used in more modern processes. But is speculation on my part. I do now have an "extra board" that I may be willing to "cut open" one of the Dutchess modules to see if we can confirm the internal workings.

[@paulfalke6227]

The integration steps of integrated circuits are small scale, medium scale and large scale. The TTL circuits are small scale, the microprocessor on one chip is large scale. The PALM processor board looks like medium scale integrated circuits. Like ALU is one chip, program counter is another chip, a third chip is opcode decode and registers are some more chips. By the way, today integrated circuits are "hyper mega super" integrated according to the wording of the 1970s.