FFT development on an FPGA - Simulation Design Flow using Quartus and Verilog (no board required).

[@arielfleitas5915]

Great video! Thank for that 🙌

[@_Tobias_267]

Hello sir, many thanks for your video, it really saved my life, but I may raise a simple question, it seems that the control_for_fft module only processes real signals rather than complex signals, as I saw that outimag of control_for_fft was assigned as 16'd0. What if the input signal is a complex signal, and the complex signal is merely a one-line 16-bit data? In other words, what if the 'insignal' of control_for_fft is a 16-bit complex signal? What are the possible changes of the module control_for_fft, if that is the case? Looking forward to hearing from you, thanks!

[@rryouluvv]

Hi,, great videos. I did the exactly same step as your tutorial here. But the output is different. I cant get the spike, my output signal, source imag always zero, and source real is still sinusoid, like invers of the input sink real. Can you help me, whats wrong? Thank you

[@cryphtic]

Hi, I have the exact same problem. Did you find any solution to this?

[@hightlightlol2106]

Do you familiar with Cyclone V SoC board?, Im planing to build an simple SDR on this board, I already have the AD-DA daughter card and I intend to transfer the I-Q data to the computer using ethernet transmittion. It will be awsome if you can share some experiences with the SoC and how to work on it!

[@fish1968-utf8]

the font is too small to view it on a laptop or phone. I think a smaller resolution, or higher magnify ratio is better.

[@thabangntema620]

Is programming altera cyclone ii different from cyclone iii?

[@VisualElectric_]

No, it's the same. Quartus will convert your Verilog and overall design into something that is suited to your device. Just make sure you select the correct device in device settings. Eventually you use up all the resources on the FPGA so the number of logic elements, DSP blocks etc is important.

[@thabangntema620]

@@VisualElectric_ ok am working on the project, so i have to design fft for the project

[@thedemolisher1181]

How do you perform inverse fft?

[@VisualElectric_]

You can use the same FFT megacore with the inverse bit high.

[@thedemolisher1181]

@@VisualElectric_ Also one more question. Can I perform fft megacore on quartus prime lite?