HWN - Real "SoC Design Engineer - Digital" Interview Questions

We polled our Reddit community and you decided what content you wanted next! The team reached out to a seasoned Digital Designer at one of the leading semiconductor companies in the world for up-to-date questions in the SoC digital domain. The following question can be asked to interns, college grads, and experienced designers because it probes the fundamental mindset that digital designers must have.
Welcome back to another episode of Hardware Ninja! Ever wondered how to get a job as a Hardware Designer in some of the top tech companies like Microsoft, Google, Tesla, Apple, Facebook, etc?
The interview process employs many application based questions whether you're a recent college grad or an experienced applicant. It doesn't matter if you want to work for Elon Musk, Tim Cook, or the up and coming start-up you heard about. We're here with curated material of real life technical interview questions.
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[@Glock02]

Have a interview tomorrow at 1:30 to start an apprenticeship I really hope I can get into it it’s something I really want to learn and develope

[@mcharlesxd3570]

Great video

[@akionomura973]

Hi all, it never happens to me to see a sequence detector before, personally i would have suggest to embed some sort of "device id" approach, even if this implies having a dedicated id for each sub unit. Moreover, using a sequence detector could you possible have some strange situations in which the data stream you want to send to the subunit is seen by the sequence detector as a command regarding start and end stream, interrupting the process? Thanks for the video, could you suggest some book regarding basic "algorithms" and approaches in digital electronics, like the sequence detector you explained?

[@prankurverma8967]

Please make an explanation for Asynchronous FIFO as well.

[@Elior92]

great video, did he ever upload the solution to its following question? How do you design the circuit?

[@hbk1517]

And why the mux is a bad solution?

[@coolwinder]

Takes a lot of space, also you need to route additional select bits for one data line.

[@biswajit681]

Please increase the uploading frequency of the videos

[@HardwareNinja]

Hi Biswajit, Thank you for being a part of the community! We're trying our best to increase the frequency of uploads, we will probably be able to do so by the end of the year. If you can recommend us to your friends and colleagues it would be amazing!

[@scarlettli6246]

Can you please put RF engineer related questions

[@DivyaDivya-px1ud]

Hi sir, can you put fpga design engineer questions.

[@HardwareNinja]

Hi Divya, Thank you for your request! We will try our best to make a video about FPGA design in the coming weeks. If you can recommend us to your friends and colleagues it would be amazing!

[@F16Raashah]

@@HardwareNinja do you already made that video?

[@jogeshsingh854]

4 flip flops --2 ^n =16 combinations

[@Dman1272]

there are only 4 states so its two flops