Minimum Number of NAND Gates for a Logical Expression

[@puneettripathi740]

THREE YEAR OLD VIDEO HELPING ME AGAIN TO UNDERSTAND CONCEPT, THANK YOU MAM.

[@ritukapurclasses1591]

Thank you 😊

[@rohanpratap2459]

Great video👍👍👍 Superb mam

[@ritukapurclasses1591]

Thank you 😊

[@rohanpratap2459]

@@ritukapurclasses1591 mam please make more videos 🙏🙏

[@ritukapurclasses1591]

Sure... Any specific topics you want me to make the videos on?

[@rohanpratap2459]

@@ritukapurclasses1591 mux demux or ADC DAC

[@myllapallikumar6260]

Sweet voice n xplantion too 😊

[@anuragrai1900]

Very Helpful and yours handwriting is just amazing.

[@ritukapurclasses1591]

Thank you 🙂

[@AMREENRAMEEZ21]

Wowwwwww handwriting superb

[@ritukapurclasses1591]

Thank you 🙂

[@rahulbhadoria_1161]

Thank you So much Mam for such a simple and Great 👍👏 Explanation

[@ritukapurclasses1591]

Most Welcome!

[@anant7652]

very nice explanation

[@MysticParagon5499]

Love this video.

[@tumtum6910]

This is what I was looking for!

[@satyaprakashsahoo7772]

Finally mam 4k subscribers... I think you don't do paid promotion... Great

[@ritukapurclasses1591]

No, I dont do paid promotions...

[@maneeshverma3896]

Great Explanation

[@Shivnath281]

Just wow..

[@anindyabhattacharya2882]

Nice explanation ma’am

[@chokopola8664]

wow thnk u so much mam this was very helpful

[@ritukapurclasses1591]

+sayan chakraborty thank you..

[@saurabhkumar-ch2xs]

thank you

[@kavinashokan5692]

Neat hand writing

[@RakeshKumar-pm2xm]

command in digital also .............super

[@ritukapurclasses1591]

+Rakesh Kumar thank you :) Means a lot, really...

[@educationkorner264]

Nice

[@Ravindramishra-bh6hq]

Implement Z=A+B using NAND implementation by converting it into its SOP form first .

[@ritukapurclasses1591]

3 Nand gates, one each to form A bar and B bar, and finally one to Nand A bar and b bar. I'll post the complete solution video by tomorrow.

[@ritukapurclasses1591]

I could send you the written solution immediately through email. Email me at [e-mail], if required.

[@Ravindramishra-bh6hq]

@@ritukapurclasses1591 Sure mam , I also subscribed and waiting for your video . Thanks mam

[@ritukapurclasses1591]

Sure :) I'll post it tomorrow...

[@harshit2soni]

If we follow this approach, then to find minimum no. of NAND GATES for xy'+x'y. our answer comes equal to 5 and the actual answer is 4. Please correct me If I am wrong,

[@koolandsexyboy]

Using the intuitive way, XOR (A,B) = A' B + A B' So, for using NAND Gates, we use double complement method: XOR (A,B) = ( (A' B + A B' ) ' ) ' = ( (AB') ' . (AB') ' )' Now in order to implement A' and B' we will have to use two NAND Gates and then two more to implement (A' B)' and (AB') '. And at last 1 more NAND Gate to implement ( (A' B)' . (AB') ' )'. Hence all in all we Will be using 5 NAND Gates. This WONT WORK ! Hence we have to think of an OPTIMIZED Solution ! Therefore we use a new method to obtain (AB') ' and (AB') ' using lesser number of Gates. Using NAND gates we directly have (AB)' . Now we can make use of this and obtain (AB') ' and (AB') ' using lesser number of gates: We see : (A B') ' = ((AB)'.A) ' And (A' B) ' = ( (AB)'.B ) ' Hence the equation can be reduced to : XOR(A,B) = ( ( (AB)'.B ) ' . ((AB)'.A) ' ) ' This solution would require 4 Gates only. Hence Logically we can arrive at this solution.

[@shravankulkarni786]

Mam minimum no of NAND gates for Y=(A' + B') (C+D)? (ISRO PAPER JAN 12, 2020)

[@SHASHANKRUSTAGII]

6

[@shravankulkarni786]

@@SHASHANKRUSTAGII Hi Shashank, how have you arrived at the answer? Any link or resource for explanation pls...

[@moulichoudhury701]

Mam , AB+BC+CD how many nand gates required for this ? Show me the process?

[@ritukapurclasses1591]

Sure... I'll post very soon...

[@ritukapurclasses1591]

@Mauli: A quick video similar to what you are asking, i.e., the process of breaking the expression into sub-expressions, and mapping them to gates is here: kzbin.info/www/bejne/rne8eIl4rNqsq80 Though, I'll pot the exact one very soon. Thank you...

[@falakkhan8147]

thank you :)

[@ratnakarmayank]

need sol for A + BC now, exam chal rha he!

[@ritukapurclasses1591]

Haha! No help for exam cheating purpose. .

[@shadanakhtar1437]

Mam please make more video on digital

[@ritukapurclasses1591]

Sure... I'll put on some more videos this weekend... Is there any specific topic you want me to start with?

[@shadanakhtar1437]

Thanks for replying, MamIam yiur Big Fan of your Concept in Digit so please make video on this toouc please iam waiting question is that ""How many flip-flops are required to make a MOD-32 binary counter"

[@shadanakhtar1437]

How many flip-flops are required to make a MOD-32 binary counter Please make video on above topic please mam

[@GM-xz4xc]

thank you maam !!

[@ritukapurclasses1591]

Happy to help...

[@raisaabbas5997]

Very informative, but what if the expression isn't provided?

[@ritukapurclasses1591]

You'll be given at least some information for which you would need to find the minimum number of nand gates. Could you specify what kind of question you are trying to solve?

[@gobeyondyourknowledge3794]

Realize the following function by minimum number of 2-input NAND gates only F ( A, B, C, D ) = B ( A + CD ) + AC

[@gobeyondyourknowledge3794]

Pls solve this problem

[@Guruji-vz8eg]

Suppose we have y= AB+CD+E What about this type que

[@debmalyasur]

Same approach should be followed... Ans will be 6 2-input NAND gates are required.

[@himanshudadrah]

What should be the ans? Minimum number of 2 input NAND gate required to implement the following function Dbar + A.B + BbarC

[@mihirvaghela2185]

What is the answer?

[@anandmaurya4045]

What is ans :P

[@harshit2soni]

@@anandmaurya4045 7?

[@sagargeetadarshan5182]

Is 4 the answer??

[@NewOne76]

Keep it up... 😊

[@ritukapurclasses1591]

+Sourav Mukherjee thank you...