Modern Page Tables: Multi-Level Paging

[@giorgifilippo]

at ~4:50, introducing the overhead if the 32 bit paging scheme was applied to 64 bit architectures: 2^64 locations / 2^12bytes/page = 2^52 pages. Page table entries can not be 4 bytes long (32 bit) to address 2^52 pages. Each entry needs to be at least 8 byte long (rounding up to next DWord). 8 = 2^3 so the required amount of memory dedicated to page tables would be 2^52 * 2^3 = 2^55, not 2^56 bytes (pen note) nor 2^54 (keynote text). I was a little bit confused. Anyway very interesting lesson, thanks for posting it! PS at 6:45 2^44 is 16 TB (2^40 = 1 TB * 2^4 = 16)

[@DavidEvans]

Thanks, Filippo! You are right, sorry for the mistake and thanks for posting the correction.

[@EtemBavarian]

A very good explanation of multi level paging. Thank you!

[@MrAseemgrover]

is nt 2^32 == 4 G and not 4 M, also I think the index is 9 bits because each entry in the page table is 8 Bytes therefore 2^9 * 8 = 2^12 Bytes = 4 KB which is the size of the page.

[@DavidEvans]

Opps! You're right, of course, 2^32 = 4,294,967,296. Sorry, this is a mistake on slide 4. The virtual addresses for 386 have 12-bit offsets, so there are 2^12 = 4096 addresses in a page, and with 2^10 pages, this gives 2^22 addresses = 4,194,304 (which can address 4M bytes of memory since each address is to one byte). (10 bits are used for the page directory, which is why we don't get the full 32-bits for 2^32 addresses.)

[@大王-b1k]

Aseem Grover Sounds promising

[@creativeprocessingunitmk1587]

I think 9 bit addresses make sense if each entry is 8 bytes, the addresses are indexing into 4bk pages