MOSFET Threshold Voltage Explained

[@Matt-vv1iv]

Thanks again, this is easily the best content out there on introduction to semiconductors. The UMass E.E. class of 2021 are all reviewing your playlists together right now.

[@JordanEdmundsEECS]

This made my day :) Thank you

[@abbaskhan4820]

Absolutely outstanding lectures

[@abbaskhan4820]

Thanks a lot sir

[@pushkarshirodkar4894]

I’m preparing for my GATE exam and I’m finding your lectures intuitive. Thanks so much 😊

[@luisbielmillan8467]

Thank you for these transistor vids!

[@smeetsv103]

very helpfull lectures during the covid-19 crisis. Perfectly follows the program of the KULeuven as well

[@grantzeman1564]

It is not too great a deal, but did you forget to divide Qs,dep by Cox when you wrote out the formula for Vox and substituted it back in? I'm just assuming its a minor mistake, but is there a reason we exclude it?

[@omkartulaskar6534]

@Jordan Edmunds Same doubt , should this be done ? divide it by Cox I agree with @grant Zeman

[@jdcl3446]

Yea in the video on body effect he did divide by Cox, so I would assume it is an error

[@josephcoon5809]

First, thank you for the video. Cheers 🍻 7:05 If the sign on the last term (Phi-ms) is dependent upon the relative position of the M and S fermi levels, why use the magnitude in the first place? It seems like if you remove the absolute value symbols constraining it to the magnitude, the sign change becomes inherent.

[@JordanEdmundsEECS]

Great question! You are right, and if you are comfortable with the math, no need to include the absolute value. Back when I made this (and even somewhat still now) I hated negative numbers, and eliminated them wherever I could. xD

[@josephcoon5809]

@@JordanEdmundsEECS Yeah. I get what you mean. I still remember getting over my initial distaste for using negative values for gravity since we grow up thinking acceleration as an increase in velocity. It didn’t take long to adjust to positive and negative just meaning direction from zero rather than an amount of something like “apples.” Even “negative apples” just means you owe somebody apples. There a many things we learn colloquially that have to be unlearned when dealing with physics like weight referring to the mass of something rather than the force it applies to a scale. I struggled for a week with the idea that something could “weigh” different kilograms depending on the planet you were on. Then it hit me that “weight” is used differently depending on the field using it. Hell, people say things are “weightless” in space, which does NOT mean “massless.” I think authors of textbooks take it for granted what people learn outside of a formal physics class and just assumes people can readjust how they use common parlance to suit. Anyhow, linguistics was a subject I never thought I would ever be interested in until I found a passion for explaining things to people. I’m always projecting the excitement of understanding new onto others only to find out that most people just don’t get that excited about these things. 😂 Cheers 🍻 to you and yours, and Merry Christmas!!

[@svenp1006]

Why do you calculate V_ox = Q_dep/C_ox ? We are not in depletion mode but in inversion mode thus the charges at the interface should be Q_dep plus the minority charges gathered by the inversion. Meaning V_ox = Q_sc/C_ox = C_sc/C_ox * φ_s? Or am I mistaken? 🤔

[@cben5151]

I wonder. Is the calculation of Vt at inversion the same for 2D materials as it is bulk semiconductor materials?

[@Sunny-np7wn]

Can I get notes of your videos

[@goleamol]

I believe, all else being equal, Vt for a MOSFET with a shorter channel length is lower than a MOSFET with a longer channel length. Can you explain how Vt is affected by the channel length based on the equation you showed?

[@goleamol]

I think I figured it out - the surface potential Phi-S or 2*Phi-FP represents the channel length.

[@JordanEdmundsEECS]

No, this model does not include any dependence on channel length. That’s why it’s called the “long-channel model”. You will need a more complex model to describe this.

[@caffeinatedinsanity2324]

I usually see VGS(th) for threshold voltage, just as a note.

[@JordanEdmundsEECS]

Interesting, which textbook do you use?

[@caffeinatedinsanity2324]

@@JordanEdmundsEECS Mostly datasheets, it's not super scientific actually.

[@vasuyadav2931]

@@JordanEdmundsEECS I think that representation might be right because in the book which I'm reading, threshold voltage is defined as gate voltage w.r.t. the source terminal, i.e., Vgs at which full inversion occurs. The book id VLSI Design by Debaprasad Das. I'm confused, what is the actual definition?

[@faizanhasan9715]

Hello Sir, I would like to ask, what is the difference between gate length and technology node in transistor scaling? I tried to look out for the answer at several places but still confused.

[@JordanEdmundsEECS]

Technology nodes are usually referred to by the *minimum* gate length they can achieve. For example a “45nm process node” means that the minimum gate length your transistors can have is 45nm. Any given transistor fabricated using that node could have a gate length much larger than 45nm (for example, 10 microns).

[@faizanhasan9715]

@@JordanEdmundsEECS oh, I think that is the clearest answer I got. Thanks a lot!

[@nightrook5732]

I think it should be ni/NA in the equation for (phi)FP. It was like this in the book CMOS digital integrated circuits by Sung-Mo Kang and Yusuf Leblebici.

[@JordanEdmundsEECS]

Night Rook That’s correct, if you want phi_fp to be a signed quantity. I like to avoid negative signs whenever possible and so I take both phi_fp and phi_fn to be positive quantities (the distance to the Fermi level)

[@nightrook5732]

Oh. That makes sense.

[@JumpingJack6]

Vt is the minimum voltage at the gate to invert.

[@brainliu4252]

Awesome explained💥💥 By the way, did you know what type matel to choose can make nmos Vfb(flat band voltage)=0 ? 🙏🙏Thx a lot👍

[@manjukm5188]

Thank you so much sir

[@electronicsexplanationvide3180]

How to see your previous vide

[@baraksamuny]

well, i'm confused. You say that an inversion in this ptype semi-conductor occurs when you apply a positive voltage. Although, I know that VT in a PMOS transistor is actually negative! so, these two facts kinda contradict each other...

[@JordanEdmundsEECS]

You are absolutely correct in that PMOS transistors have negative threshold voltages. The “P” refers to the type of carriers *in the channel* during inversion, not the type of carriers of the substrate. So the transistor in this video with a p-type substrate was an NMOS and has a positive threshold voltage.

[@halmirofigliolo1637]

I think you forgot the /Cox in the Vox term

[@glen5680]

Vox and should be Q divided by Cox, not Q

[@asifalikhan8677]

Hi. Thanks for the informative video u share .. I need some help for MOSFET can I have u r email

[@Peter_A1466]

You realise you don't explain what the threshold voltage as a property of a mosfet practically is?