Phase Locked Loop Tutorial: the basics of PLLs

[@turbo2ltr]

Good start, but ended right when it got interesting!

[@ElectronicsNotes]

We are planning some more videos on the topic. We don't want to make each one too long otherwise people move away from them, so I plan to do a series on PLLs and PLL based synthesisers later this year.

[@abdurrahmanbaylan4099]

where can I find other videos? because this video stopped at a question that i am looking for an answer to it?

[@HeadphoneTarnish]

@@ElectronicsNotes I'd love to see more PLL vids! Your style is very clean, and the information is well paced and explained.

[@matiasrk]

@@ElectronicsNotes Want to see more videos about PLL

[@EdmundWilliams777]

On one of the biggest uses is to amplify Frequency to higher frequencies by inserting a frequency divider between the VCO and the frequency/phase detector. Thus amplifying frequency in the same way an OP Amp amplifies voltage levels. Remember crystal oscillators only go up to about 300MHz, any frequencies higher than that must use a PLL. This is how todays PC's can operate at multi-gigahertz speeds. The internal processor has a series of about 7 PLL's amplifying a 133MHz crystal oscillator to 3GHz or more.

[@ElectronicsNotes]

Yes you are right PLLs can be used to multiply frequencies and are used in synthesisers as a result. We may do an additional video to explain the working of synthesisers in the near future.

[@balunagendra8136]

Any Video created to explain this theory? If yes, could you please point?

[@neodiy]

simple straight to the point info....brilliant thanks for sharing knowledge about frequency amplification. But i have a question what is exactly reference signal? can a crystal generated frequency consider as reference signal?

[@sss2393]

thanks sir for sharing info

[@donruhl6680]

@@ElectronicsNotes TV g g b g

[@กานต์แซ่โซว]

Thank you so much. This helps me understand what I've been confused for a month!

[@ElectronicsNotes]

Glad you found the video useful.

[@FireCrossX]

That was a very good explanation! Keep making more RF videos!

[@ElectronicsNotes]

Thanks very much. I have another on VSWR coming out soon and we are making another one on the superheat radio. It would also be good to do one on PLL based synthesisers.

[@agstechnicalsupport]

Pretty good introduction into the concept of Phase Locked Loop !

[@ElectronicsNotes]

Thanks very much for your comment and encouragement.

[@alokshukla5700]

Best explanation With good basics to understand

[@ElectronicsNotes]

Thank you for your comment.

[@koure94]

Great explanation! It would be nice if you could explain the basic of an DDS and talk about advantage and disadvantage compared with PLL. Keep em coming :)

[@ElectronicsNotes]

That is an idea for the future and something I would like to cover.

[@leonardebron6032]

Probably a slow question, but when you say "frequency synthesizer", does that mean you can increase frequency of an input signal?

[@ElectronicsNotes]

You may want to watch our video on digital PLL synthesizers to find out more: kzbin.info/www/bejne/a3yagamZasurkKs

[@VoidHalo]

I was just thinking today I have pretty much everything I need to make a crude PLL. I can use an XOR gate for the phase comparator, an RC circuit for the filter, the VCO can be a variation on the BJT based astable multivibrator, which admittedly isn't very stable for a VCO but I guess I could also make one out of an op-amp alternatively. Use a 555 for the input and BAM. Makeshift PLL. Now to get around to actually implementing it.

[@ElectronicsNotes]

Great.

[@hongbinbin24]

Very Clear! Thank You.

[@ElectronicsNotes]

Thanks - glad you like the video.

[@damny0utoobe]

PLLs are also used in almost all modern digital circuits for clocking

[@ElectronicsNotes]

Yes and they are used in a hole lot more things besides.

[@manfredcaranci6234]

Is it a necessity that the VCO slope of ΔF/ΔV be positive? i.e., the VCO's output frequency increases when the input voltage is more positive?

[@ElectronicsNotes]

If the VCO slope is not positive all the way, then the loop will start to oscillate - a very similar effect to negative resistance in an ordinary circuit causing it to oscillate, but in this case it is for a loop.

[@manfredcaranci6234]

@@ElectronicsNotes I fully understand the requirement that the ΔF/ΔV curve be monotonic, but couldn't the ΔF/ΔV curve be negative and monotonic?

[@vaishnavj2589]

Please make the video of complete explanation of Phase detector.

[@ElectronicsNotes]

Thanks for the suggestion - I may see what we can do. You may want to check out this page about phase detectors. www.electronics-notes.com/articles/radio/pll-phase-locked-loop/phase-detector-digital-analogue-mixer.php

[@mpowtech4467]

What's the difference bw phase locked oscillator and phase locked loop???

[@ElectronicsNotes]

The PLL refers tot he whole loop. Strictly the phase locked oscillator is just the oscillator itself, but it will need the other components within the loop to phase lock it, so they are really talking about the same thing. I suppose the only difference is that the focus of the discussion for a phase locked oscillator is on the oscillator itself.

[@mpowtech4467]

@@ElectronicsNotes ok..nice...thank you very much...

[@rhalphaugusto]

Nice job!!!! One more new subscriber for your channel !!!

[@ElectronicsNotes]

Glad you found it useful We will have some more videos coming out over time.

[@mherziarescatie]

Time travel needs to be acknowledged

[@Nechros]

what's the difference between lock range and capture range or the signal being locked or captured? they sound exactly the same to me. in class we were told to know the difference.

[@ElectronicsNotes]

The capture range of a PLL is the range over which it will be able to go from a non-locked state to a locked state. When using a phase only detector this is essentially the bandwidth of the loop. This is the capture range. However once it is in lock, it is possible for the VCO to be dragged over a wide range. This is the lock range. In other words the capture range is the range over which it can go from a non-locked to a look state and the lock range is the range over which it is able to remain in lock once it is locked.

[@Nechros]

In my book it states... the error voltage causes the VCO freq to equal the input freq, at this point the PLL is in locked condition. if the input changes, the phase detector and filter produce a new error voltage that forces the VCO output to change until it equals the new input. any variation in input is matched by VCO so circuit remains locked. if input freq is out of lock range, PLL reverts back to free running freq. once back into lock range the immediately adjusts itself into locked condition. this action is referred to as capturing a signal. here, locked and captured sound the same. I did leave out some sentences on phase. to me, it sounds like when "locked" there is a phase difference of 90 degrees. and maybe when "captured the phase is the same as input?

[@ElectronicsNotes]

Yes this is quite right. Once in lock the loop will remain in lock whilst the VCO can be pulled that far. Capture range is not defined by the amount the VCO can be pulled but instead by the way the error voltage is generated. If an analogue phase detector that is only phase sensitive is used, when the loop is out of lock the frequency generated as an error voltage may be outside the loop filter bandwidth and therefore no corrective error voltage will be seen by the VCO and therefore it won't be able to be pulled into lock. This the capture range is defined by the loop filter and affects the way the loop goes from unlocked to locked state; the lock range refers to when the loop is in lock and how far it can be pulled when it is already locked. You may find this page useful: www.electronics-notes.com/articles/radio/pll-phase-locked-loop/tutorial-primer-basics.php

[@Nechros]

ElectronicsNotes thanks for your help!

[@ElectronicsNotes]

Glad we could try to help explain all about phase locked loops. When I get time I will try to add some more about capture range and lock range tot he page on the website.

[@robertsyrett1992]

3:21 I really would like to know how a phase detector works, can anyone link me to the relevant video?

[@ElectronicsNotes]

I am sorry we don't have a video on the working of phase detector, but you may be interested in this article: www.electronics-notes.com/articles/radio/pll-phase-locked-loop/phase-detector-digital-analogue-mixer.php

[@robertsyrett1992]

@@ElectronicsNotes Thank you for the reply!

[@ilyakrylov3827]

That's work with square wave signals

[@CEA9234]

Lol. I said to someone this is more difficult than solving civil engineering structural (mechanical) issues. Haha well both have their difficulties. But the civil problem was doable if MATLAB can do the calculus or math computations. Problem solving for most engineering problems or designs

[@ElectronicsNotes]

I always found any civil and mechanical engineering really hard at university. As you say MATLAB can do a whole lot of this stuff.

[@robertsyrett1992]

When you say synthesizers, you aren't talking about musical synthesizers, I take it?

[@ElectronicsNotes]

That is correct - they are PLL based frequency synthesisers used in radio systems - everything from cellphones through to communications receivers, spectrum analysers, signal generators . . .

[@bonbonpony]

06:10 That was precisely my question straight from the beginning of the video, and this is not an answer at all :P

[@antiagonista]

Yeah, I agree. The main use is frequency synthesis, where a frequency *DIVIDER* is used between the VCO and the Phase Detector. Therefore, you *divide* the feedback frequency by a constant value, forcing the VCO to *multiply* its output frequency by the same constant value. You are basically tricking the Phase Detector in thinking that it's producing a lower frequency, forcing it to compensate and, in reality, produce a higher frequency.

[@bonbonpony]

@@antiagonista Yeah, I learnt that by watching a nice explanatory video from Maxim Integrated ;)

[@alexa.davronov1537]

Worst explanation ever. What does PPL? Multiplies frequencies? To vague. Why not to explain further?

[@ElectronicsNotes]

I am sorry you did not like the video. I am sure there are others that might give you what you need.

[@alexa.davronov1537]

@@ElectronicsNotes Consider such comments as a free feedback to improve what you are doing.

[@ElectronicsNotes]

Thanks for the update. Yes we are always trying to improve - the video was one I did some time back and people have appreciated it, but it obviously does not meet the needs of everyone. I will look to see how we can improve future videos. Thanks.

[@levitezer]

All these explanations fail to explain why. The input and output are the same just using a direct wire, so what is this loop for. There must be some target frequency missing from the explanation.

[@nijaspider]

I am a undergraduate student who has a senior design project involving satcom and software designed radio. Needed some knowledge on PLL and this video delivered. Great job!

[@ElectronicsNotes]

Glad the video helped. We also have some more information on PLLs and synthesisers on our website: PLLs: www.electronics-notes.com/articles/radio/pll-phase-locked-loop/tutorial-primer-basics.php Synthesizers: www.electronics-notes.com/articles/radio/frequency-synthesizer/synthesizer-types-introduction.php It might also be worth taking a look at some of the pages linked in on phase noise as this is a very important facts for satcom systems - I discovered this some years back when I was working on a satcom system.

[@milesemanuelpaavola7994]

Great video. Thanks for sharing. Helping immensely with my Electrical Engineering studies. :-D

[@ElectronicsNotes]

Glad it was useful. Thanks for the comment.

[@kevinatkab5219]

If you substitute a motor for the vco, you can lock the speed of the motor to the reference. that's how many direct drive turntable motors work.

[@ElectronicsNotes]

Thanks for your comment.

[@Mulazim.]

Great tutorial, PLL is the best technology ever used for all tranceivers,stability,easy to divide frequency,I have made some RF projects in 90's especially for FM transmitters.

[@ElectronicsNotes]

Thanks for your comment.

[@ArvindSingh-kl5gm]

very nicely explained.. good job sir.

[@ElectronicsNotes]

We are currently working on a lot more videos to appear over the coming weeks and months. Thanks for your comment.

[@swathinayak5203]

Good video on PLL's. Simple yet very much understanding. Thank You

[@ElectronicsNotes]

I’m really glad you found the video useful. Thanks for the comment.

[@АлександрДунай-е9ъ]

Taylor Ronald Harris Sandra Jackson Dorothy

[@BnmAsd-m5r]

White Jessica Martin Lisa Taylor Lisa

[@CEA9234]

Tho I'm EE my focus was in power systems and electronics ( analog and digital). So I didnt learn much RF or PLL in school per se. I could learn this stuff too but not strictly necessary for me anymore. Interesting stuff tho

[@ElectronicsNotes]

I confess I found designing them very interesting if a little challenging to get the required performance.

[@icekk642]

the clockwise phasor is icking me outt

[@janalba7690]

tng ina ung ads ng cornetto n yn ah, tinapos q p tlga

[@zinhaboussi]

very good video thank you

[@ElectronicsNotes]

Thanks for the comment, glad you liked it.

[@ПавелСергеевичШушунов]

В этом видео популярно описаны основы ФАПЧ. Спасибо авторам.

[@PopryagaMike]

неожиданно.

[@mountp1391]

phase-locked loop could be tracked on what happened before frequency backward of circuit

[@boblund8444]

Why do you go CCW on your Cartesian coordinate graph? I'm not sure if this is specific to PLL applications or just an arbitrary choice? I have only ever seem it used where the 3 o'clock position is the 0/2pi radians (a mirror of your layout). Edit: I found it, this is the layout for a phase circle. The more you know....

[@ElectronicsNotes]

Hope you managed to discover what you needed now.

[@ollie4355]

91.8 passion FM.. Old Skool

[@eduardofreitas8876]

Great explanation. Could you ask a question that I couldn't answer for my teacher? After the pll locks the clock of a transmission, what happens if that transmission is interrupted momentarily? Does the receiver's vco clock get lost and to work or does it stay indefinitely at the last locked frequency?

[@ElectronicsNotes]

This is a really good question. It all depends on the loop filter. If the loop filter is very narrow, then it will tend to "remember" the voltage on its output and as a result the VCO will stay on the same frequency when there is no reference. However for wider loop filters, the effect will not be the same and there will be a disruption on the output with resulting sidebands according both e frequency of the signal pulses coming in front he reference. The concept of carrier or reference reconstitution was used in old analogue colour televisions where a colour burst signal was sent. This was used to control a PLL and having a crystal oscillator, VCXO as the VCO in the loop this was able to hold the frequency and phase of the colour burst so that the chrominance or colour information could be decoded correctly. I hope this answers your question.

[@friosminsysnym]

To be honest man, you've made a very good start but very poor ending..

[@ElectronicsNotes]

Thanks for the comment. We’ll try to improve on future videos. I’ll take another look at it snd see how I could have improved the end sections.

[@friosminsysnym]

@@ElectronicsNotes 👍 cheers!

[@Jarrod_C]

why filter the high frequencies in particular? What if the frequency to lock is a high frequency?

[@ElectronicsNotes]

The high frequencies need to be filtered otherwise the reference frequency appears on the output as sidebands either side of the main carrier - spaced by an amount equal to the reference frequency. This is important for frequency synthesisers that use PLLs. It is therefore normal to have a relatively low loop cutoff frequency to give sufficient reduction of these spurs. The cutoff frequency is also normally high enough so that VCO noise can be reduced close to the carrier.

[@timilehinbamigboye5166]

Do you have an idea on a project involving the design and construction of a radio frequency synthesizer for digital microwave application

[@ElectronicsNotes]

There are all sorts of projects that could be done using a PLL. I suggest you check out the Internet for PLL projects and see what is available.

[@gerzy1190]

One important use of a PLL - Reduces clock jitter in high frequency applications.

[@ElectronicsNotes]

Good point. PLLs can do this by effectively filtering out the jitter by reducing the loop bandwidth to remove the jitter sidebands.

[@OPKECTPAHT]

Спасибо. Довольно наглядно, просто и понятно.

[@FabianMueller]

What if the frequency of the signal that needs to be locked is varying? Whats the output of the phase detector then?

[@ElectronicsNotes]

If there is a frequency difference between the two signals the phase detector still gives and output and normally brings the loop into lock. Take a look at out page on phase detectors: www.electronics-notes.com/articles/radio/pll-phase-locked-loop/phase-detector-digital-analogue-mixer.php I hope this helps to explain.

[@FabianMueller]

Thanks for the quick answer. The only thing i do not quite understand is the part: "The sense of any change in this voltage is such that it tries to reduce the phase difference and hence the frequency between the two signals. Initially the loop will be out of lock, and the error voltage will pull the frequency of the VCO towards that of the reference, until it cannot reduce the error any further and the loop is locked."

[@ElectronicsNotes]

Essentially what happens is that the phase detector gives a voltage output proportional both phase difference between the two input signals. This is used to drive the voltage controlled oscillator. The loop gets to a point where the voltage output from the phase detector holds the VCO at a frequency where there is a constant phase difference, sufficient to generate the required voltage needed to hold the VCO on exactly the same frequency as the reference.

[@xzone6976]

do u knw how to get 10mhz output frm vco with 1mhz input.. i need the circuit diagram with components value..

[@ElectronicsNotes]

The basis of the circuit would be to have a phase locked loop with a divide by ten counter between the VCO and the phase detector. I am sure there are plenty of designs out there you can use without the need to design one from scratch. I hope this helps.

[@MrFlexNC]

why oh why didn't you continue for output at higher frequency

[@ElectronicsNotes]

Good point - I was going to cover synthesisers and the concept of multiplying the reference frequency in another video, but have not had the time to make it yet. Thanks for the comment.

[@nejatorkutgokus2801]

hi . I have a question. if input frequency is sawtooth or ramp. what happened output frequency . is it sawtooth or is it ramp signal .help plss

[@ElectronicsNotes]

It depends. Typically phase detectors will use digital techniques and the waveform will be squared up for the phase comparison. However the chief governing factor is the oscillator and its successive stages. Often they will produce a sine wave or a square wave. You could use some conditioning circuitry to convert whatever waveform the circuit produces to a triangle wave, etc.

[@nejatorkutgokus2801]

first thank you.only ı want produce to sawtooth wave with pll. ı don't want external circuit. Do you have any suggestions ?

[@nejatorkutgokus2801]

www.ti.com/lit/ds/symlink/lmx2491.pdf Is it useful.what do you think?

[@saarike]

Thank you!

[@fabioromano3999]

great job Easy and Highly efficient. Good Luck 4 new videos

[@ElectronicsNotes]

Thanks

[@GauravGupta-pb8mk]

Thank you sir

[@ElectronicsNotes]

I'm glad we could help.

[@Wirewrap36]

Phenomenal video! Thank you!

[@ElectronicsNotes]

Glad you liked it!

[@josip1881]

Awesome, nice and short, thanks!

[@ElectronicsNotes]

Glad we could help.

Good Job👍

[@ElectronicsNotes]

Glad you liked the video

[@moaazsherif5236]

are there any recommended textbooks giving more information about its mathematical analysis ?

[@ElectronicsNotes]

There are lots of books around. Some of the ones I have used in the past are now out of print (Floyd M Gardner, Ulrich Rohde, etc . . . . W P Robins Phase Noise in Signal Sources, etc . . ), but there appear to be several good ones around now. Take a look on Amazon and see what gets some good reviews.

[@moaazsherif5236]

thanks a lot :)

[@premsudheer2092]

very well explained.... we need more from uuu

[@ElectronicsNotes]

Thanks for your comments - we have a number of videos on oscilloscopes that will be launched over the next few weeks. Thanks again.

[@engr.rizwankhalid3184]

Nice Sir

[@ElectronicsNotes]

I am glad the video was helpful.

[@neeleshpandey9517]

best explaination ever

[@ElectronicsNotes]

Really appreciate your comment. We will try to keep the standard up and add some more videos of interest to you before too long. Thanks again.

[@crunchy1813]

Wasn’t looking for this pll

[@ElectronicsNotes]

Hope you managed to find the sort of PLL you were looking for.

[@crunchy1813]

ElectronicsNotes I was making a joke about cubing but thanks anyways!

[@SandeepYadav-vn8hw]

Nice..

[@ElectronicsNotes]

Glad you appreciated it. Thanks for your comment.

[@caleb7799]

don't smack. I'm gone!

[@veepedaldude9404]

Im experimenting with running a guitar signal into it.