Power Dissipation in CMOS Circuits | Back To Basics

[@BlueMirchi]

Thanks for the quick and crisp video on Power Dissipation. Keep it up!!

[@ajaychowgoni833]

No comments madam....simply superb....applause

[@tejasrangnekar]

A good video for beginners in PD domain. Great effort! Thanks! 😇

[@srinivasanp3261]

I appreciate that keep posting PDN related videos

[@nilaudaymithra1337]

Very much helpfull ma'am. Nice presentation

[@souradeepkhan7854]

Thank you ma'am great explanation

[@priyauma7992]

Really a good explanation video thankyou

[@debajyotibanerjee5596]

Please make more such videos. Very nice explanations.

[@ramneethu7317]

Very good explanation thank u

[@ajith3922]

Good Effort 😊

[@hardeepsingh-kw8pi]

Great explanation..Keep it up...

[@sruthinbalachandran9998]

excellent explanation...

[@pavankalyan_varudu1515]

good video 👍

[@sowmyasony8319]

Thanks for your video mam, very helpful ❤️

[@sumitdebbarma1209]

Mam did you explained or did I not notice in ur video the section " power needed to charge or discharge the internal nodes of a transistor ".

[@soorajjp1847]

wow good channel dedicated to PD. Consider changing the channel name related to PD. Initially i thought its related some basic physics. Later came to know that channel is for VLSI

[@Adityakumar-tc6te]

Thank you so much mam ❤❤🙏

[@ranimarie1528]

Hats of u🙋

[@Surendra123klo]

good information

[@harshitabhardwaj8323]

Tomorrow is my presentation n i haven't prepared anything till now bcz of my exam.. Hope this helps🌸❤💜

[@pemmakavijaykumarreddy5852]

thanks mam good explanation

[@dheerajmothukuri6158]

good oveview thank you.

[@avinashvinith84]

Mam, please make video on PBA and GBA mode of timing analysis. Thank you

[@ChandanKumar-fj2iz]

Nice explanation...#Need to know the actual area of dissipation in 3D model #Real time.

[@Gagan_1011]

So good

[@jeeveshvanga2598]

Thank you Mam

[@deepukatroliya2237]

Good mam

[@soujanyabhat8974]

How are the diodes reverse biased in the junction leakage cmos?

[@maddireddykotireddy4371]

Helo mam , in the internal power dissipation. to changes the input but it may not be effected the output at that time what are the dissipation occur

[@PardeepSingh-wj8lc]

Great

[@nerelladhanalakshmi7583]

Thanks mam

[@Sankeerth_]

Mam you said that in gate leakage current, gate oxide is very thin, it allows gate current to pass through it, but the gate current is 0 mam in case of cmos inverter.

[@rishavkumar711]

this is second order effect i think ///

[@rishavkumar711]

ideally it is o but not practicallyyy

[@maxalex2055]

Ma'am does it is possible for a candidate from tier 3 college with 60% to get a job as a fresher in vlsi domain

[@rishavkumar711]

ha bhai koi dikkat n hai yr...

[@tharunprathapan5883]

its difficult

[@baswarajsghali2074]

In the dynamic power dissipation, in switching power dissipation, will there be any power dissipation, if the output is not changed due to input?

[@backtobasics5602]

In that case, it will come under internal power, not the switching power

[@cowbig8342]

Nice topic, can you plz share a ppt of this? tks!

[@karanvedi6779]

Kinda information is not easily found...🙏🙏

[@moresudha1763]

👏👏👏🎉

[@mohangowda4282]

hi mam , good explanation plz share a link for ppt/pdf file used in above explanation

[@sofiamushtaq2410]

Why CMoS power dissipation depends upon frequency

[@anuragec1026]

Source and drain are represented by n+ , it should be n-

[@anuragec1026]

if that represents charge on it