RISC-V方便客製專用處理器。專門做某些運算的processor ,在用途上運算速率會快過泛用型processor。多個不同系統的communication再使用 另個特殊功能的processor來translate or communicate。落實專業分工,單位時間內操滿每個processor。
@changadam8731 Жыл бұрын
🎉🎉🎉nice presentation …… clear and briefly
@Tech4AllYall2 жыл бұрын
補充一下來自SemiWiki編輯對於RISC-V的看法: The original motivation behind the initiative that have given us the RISC-V architecture is experimentation. Experimenting to develop chip designs that yield better performance in the face of expected slowdown of Moore’s law. RISC-V is built upon the idea of *being* *able* *to* *tailor-make* *particular* *chips* where you can *choose* *which* *instruction* *set* *extensions* *you* *are* *using*. Vector extensions allow for processing of vectors of any length using functions which process vectors of fixed lengths. Vector processing enables existing software to run without a recompile when hardware is upgraded in the form of more ALUs and other functional units. Significant progress has happened in terms of established hardware base and supporting ecosystem such as compiler technologies. *RISC-V can be optimized for a particular domain or application through custom extensions*. As an open standard instruction set architecture, RISC-V users enjoy lot of flexibility in choosing a supplier for their chip design needs. 原文: semiwiki.com/ip/sifive/299157-enhancing-risc-v-vector-extensions-to-accelerate-performance-on-ml-workloads/
Greetings from Brazil, any one from Macau cant put portuguese subtitles? Thanks for the vídeo. Olá, saudações do Brasil, alguém de Macau poderia colocar legendas em português? Obrigado pelo video
@CatFtr10 ай бұрын
2:40 半客製化事業部可沒那麼屌的開發能力 最主要還是要感謝IF匯流排
@chuntingli67962 жыл бұрын
所以可以把riscv理解成一個像asic的term嗎? 就像application specific instruction set architecture 反正我們都可以說自己在用riscv 但我的riscv又不等於你的riscv
@Tech4AllYall2 жыл бұрын
我其實很想在影片中提到ASIC哈哈哈 不同公司的RISC-V處理器差異最大的應該就是在extension support,像SiFive跟晶心現在都有custom extension和相對應的core level support 可能不至於到一個RISC-V各自表述的地步,而是在關鍵/特別的功能上會有明顯的差異,但那些功能正是大家不用arm/x86,特別選擇RISC-V的原因