SPI (Bit Banging)- IO from Scratch - Part 4

[@weirdboyjim]

Join us on Discord: discord.gg/jmf6M3z7XS Follow me on Twitter: twitter.com/WeirdBoyJim Support the channel on Patreon: www.patreon.com/JamesSharman

[@weirdboyjim]

If you came here to comment that I popped the registers in the wrong order (thereby swapping “b” and “d” rather than preserving them) well done. I didn’t spot that until previewing the final video.

[@TroySchrapel]

guilty. glad you found it :D

[@-lolus-]

nah, i am here just to watch and be in awe. grat video

[@j.r.qwertz]

My sense of order took off and I was about to write it. Glad you found it.

[@RoamingAdhocrat]

have you considered having a formal Pinned Errata Comment under every video where you put this kind of stuff?

[@GodmanchesterGoblin]

Yes, that's *exactly* why I came here... 😅

[@Biomancer81]

I would very much enjoy seeing a full SPI implementation.

[@weirdboyjim]

Noted, I want to do enough to get a much better transfer rate.

[@Biomancer81]

@@weirdboyjim I honestly am enjoying all of the series' and look forward to seeing more. And thank you for the response.

[@rimmersbryggeri]

@@Biomancer81 Same. I don't really undestand half of what James is doing but it's still fascinating.

[@nockieboy]

I would love to see a full SPI implementation! I had a go at designing one a couple of years ago, using parallel to serial (and vice versa) shift registers, but never had the time to finish it. Would love to see how you implement one!

[@weirdboyjim]

I think it can be done in a fairly straightforward way. Handling the mode variations adds a bit of complexity.

[@Zer0ji]

Regarding sensibly sorted date formats: ISO 8601 takes care of this, and uses - as a separator Current time: 2023-12-29T17:50+01:00

[@weirdboyjim]

If only we didn't have to worry a about time zones!

[@emolatur]

The SPI implementation used inside the atmega328p is described pretty well in the datasheet, and I've often thought about trying to design a ttl implementation of it...

[@weirdboyjim]

Interesting, I might take a look at that after I'm done to see how differently they did it.

[@andrewwatts1997]

I would love to see a full implementation! And then hooking the cpu up to a variety of " Arduino " sensors ? distance, proximity, temp and moisture etc etc.

[@weirdboyjim]

Yeah, having standard protocols like SPI opens the door to lots of extra things, I don';t want to dwell on that too much as Arduino type sources cover that all pretty well.

[@teknifix]

Last year I had a lot of fun learning SPI using my 6502 sbc and the MAX3100 serial IC. It wasn't nearly as complicated as I thought it would be. Great video, sir!

[@weirdboyjim]

Thanks! Glad you enjoyed it!

[@richardlincoln886]

FWIW, you've inspired me - not just this video but the series. I always fancied Forth, wrote interpreter/compilers as a teenager on C64/6510 and then 68k on Amigas. At least on paper, I'm going to tinker with a simple Stack based CPU. Sure - its been done before, but the mental exercise of drilling down to microcode/metal level with potential for implementation on 74 series chips is irresistible - kind of like learning to code in the early 1980s. Heading back to the infinite rabbit hole of computing :) Great series - many thanks for sharing your progress.

[@weirdboyjim]

You are very welcome Richard! Good luck with your build, maybe join the discord and share some details?

[@martinmckee5333]

I like the idea of a hybrid implementation as well. I have designed SPI blocks for instantiation in FPGAs and those are simple. I have also used the RP2040s PIO blocks to implement modified SPI and the protocol is highly amenable to implementation with just a handful of simple commands, so I think the SW/HW hybrid solution would be interesting to see.

[@weirdboyjim]

I'd like to see how few components I could use to get a transfer rate at the cpu's clock.

[@OscarSommerbo]

A hybrid approach would probably be the most fun and rewarding. While throwing a bunch of silicon at the problem has its allure, it would reduce the flexibility that software gives, while doing it all in software will be slow and tedious. So a mixed approach is what I would favor.

[@weirdboyjim]

My plan is to try and expand it incrementally testing different component trade offs against the speed benefit.

[@OscarSommerbo]

@@weirdboyjim Sounds like the logical and sound approach I have come to expect. I'm looking forward to it!

[@Vintaronica]

You have the best sounding keyboard I have ever heard. 😮

[@weirdboyjim]

Lol, I think there is some indirect coupling to the mic through the desk that makes it sound louder than it is, but I do tend to punch that enter key at the end of a line!

[@helmutzollner5496]

Hi James! Great Flic! Yes, go for a minimal chip and max speed approach in hardware. Curious to see how you can implement thatbwithpit Interrupts.

[@weirdboyjim]

I'm leaning in that direction. Partially because of how much ambiguity there is in "Full implementation".

[@TomStorey96]

Neat. SPI will open up a world of interesting peripherals. If you want to go even faster, implement a QSPI interface and you'll get a full byte in only two clock cycles. 🙂

[@weirdboyjim]

I would struggle to consume data that fast!

[@_Funtime60]

A partial implementation would be neat, but it'd bug me that it'd be incomplete. What I'm more interested in is the variety of SPI devices out there. IIRC SD cards do SPI but there's also SPI to Ethernet adapters. you'd still need to do a lot more to get online but the possibility is cool enough.

[@weirdboyjim]

An interesting discussion is "what constitutes complete". For me that would be read/'write a byte without supervision.

[@_Funtime60]

@@weirdboyjim I certainly don't know myself.

[@daskasspatzle2396]

Well done again :-) I would prefer to see the full hardware SPI implementation.

[@weirdboyjim]

Thanks! I've been giving some thought on how to approach it but I have another couple of videos to work on first.

[@vitormoreno1244]

If you have a spare peripheral line on hand you can build a 4MHz hardware SPI with 4 ICs, just use the good old 74HC165 for MOSI and 74HC595 for MISO and some basic logic ports.

[@weirdboyjim]

4 IC's? I can see a full speed hybrid with less than that but I've not planned out a full implementation yet.

[@alexloktionoff6833]

Is it possible cost/performance efficient implementation? i.e. add one chip, but increase order of magnitude performance? @@weirdboyjim

[@wallyhall]

ISO date format ftw! YYYY-MM-DD all the way!

[@weirdboyjim]

I'm not going to argue!

[@atomic14]

I've always wondered what SPI mode actually referred to. Now I know - thanks James!

[@weirdboyjim]

Glad you found it interesting Chris! This is one of those times I suspect a committee couldn't agree and so the variations became "modes".

[@LeeSmith-cf1vo]

I think it would be interesting to have the unrolled loop in hardware. This may have little/no effect on the overall transfer speed (assuming the spi is using the same clock) but might free up the cpu to do something else while it waits for an entire byte to be available. Not a very efficient way to do things here, but a good opportunity to demonstrate async i/o maybe?

[@weirdboyjim]

I was thinking, Just the addition of single shift register to pull the bits in and let you read all 8 at once would double the read speed.

[@fredflintstone904]

In the software version a single routine which does a swap will work for either a read or a write. That would take a few more cycles when just a reading or writing but would save some code. (When reading it doesn't matter what ends up going out on MOSI.) I always enjoy the puzzle of doing a minimal hardware acceleration of some software.

[@weirdboyjim]

Indeed, but the logic flow of what I did here made more sense for the video. I like to build things up incrementaly.

[@theboot100]

James your amazing! Software SPI protocal in half a day in assembly 😮 I would love to see you build a full hardware SPI set up and see what speeds you could get. Would you create a buffer for in/out?

[@weirdboyjim]

Thanks! Very kind words! I'm not sure a buffer would be a benefit here. All the devices I've looked at could max out the transfer speed I can hope for but most importantly do so on demand. There wouldn't be any benefit above my reading it directly.

[@penguineer]

I would be very interested in seeing a full SPI hardware build. Did a reduced version recently for an 80s style electronics clock. :)

[@weirdboyjim]

I definitely want to get the transfer rate up!

[@porklaser]

A common technique I've seen in microcontrollers is to (ab)use the spi peripheral to achieve certian I/O tasks faster than they can be done on the gpio. Maybe an I/O peripheral that could be leveraged to do things like SPI and something else like I2c would be useful. Or maybe that would be scope creep. :)

[@weirdboyjim]

It does make a lot of sense!

[@OriginalJetForMe]

Absolutely make a full SPI hardware block!

[@weirdboyjim]

I'll see what I can do, I'll definitely take the circuit further!

[@JonnyBergdahl]

I would love to see a hardware implementation!

[@weirdboyjim]

How much of that is because it would give me enough bandwidth to stream Rick Astley?

[@JonnyBergdahl]

@@weirdboyjim I would say about 50%. And a hybrid solution would be interesting.

[@sebastiendumais4246]

Hi! I have watched most of the videos on your channel and I really enjoyed the progression! It’s actually inspired me to start my own homebrew “modern retro computer”…. One thing that I didn’t see and I was curious about is how big is the full build at this point…. It seems like the size of about “3 hands wide😅” but I’m curious to see how big it actually is…

[@weirdboyjim]

Well, the new laminated board it's all sat on is 90x45cm. The Cpu itself is 38.5x31 so what you see in this video is about 67cm wide. The final build once everything is concerted to pcb and mounted should be about the same.

[@johansteenkamp9214]

Also would loke to see a full SPI implementation. Curious to know: are you going to make an implemtation that allows to promatically switch between the differerent SPI modes (0-3), or are you just going to swop out wires if you encounter an SPI device that needs a different SPI mode?

[@weirdboyjim]

Ideally I'd have a couple of spi devices at a time so I'd need to at least support the modes they require,

[@vaclav_mach]

I’m curious about the DS1391 time accuracy because of its’ external crystal. I used DS1307 (ext crystal, I2C) for my watch project and it drifted like half an hour per month. After switching to DS3231 with integrated crystal and temperature correction it now drifts just few seconds per month. Maybe it would be worth it to switch to SPI based DS3234? Maybe it’s overkill though, but I can imagine in some more permanent exhibitions/installations it would make sense 🙂 and it also has an 256 byte battery backed SRAM, could be used for some experiments.

[@weirdboyjim]

Interesting, I just powered it back up. It's about 1:15 in advance of my pc clock, but it wasn't set perfectly to the second. That's about 23 days since I set it. I'll run some more structured tests when I get an opportunity.

[@vaclav_mach]

@@weirdboyjim 1:15 is quite a good result, thanks! It makes sense, since it’s probably in a relatively stable conditions… compared to having it mounted all day on a wrist when it’s 30 degrees C outside (40 in direct sunlight) and 20 deg C inside.

[@Schwuuuuup]

Most interesting application for high speed SPI for me is graphics. I would love to see the machine to show animated video on an off the shelf spi tft display. If this would work with your simple approach, I would cheer for it. But if the simple approach cannot deliver the needed SPI mode or if varying bit widths are needed (some sensors have 12 or 14bit spi, if I recall correctly) I would like to see the full blown version. In other words if the SPI is just a proof of concept it's no good, but it does not have to support every mode that theoretically exist but no device really relies on

[@weirdboyjim]

Comments seem to be dragging me towards a full blown version. Problem with doing graphics over spi is the bandwidth would never come close to the vga sub system sat directly on the main bus!

[@akkudakkupl]

He already is hurting for raw bus speed to do full resolution VGA with the dedicated hardware, SPI display has way more overhead than that and yet lower bus speed - might be OK for static images or some very low fps stuff.

[@Schwuuuuup]

@@weirdboyjim no, sorry, I didn't mean a replacement for the "GPU" I was thinking about a status display or touch screen interface with some blinkenlights. Not youtube on the screen

[@ExtremeMetal]

Am I right in thinking the SPI protocol allows for accessing SD cards?

[@weirdboyjim]

SD Cards can indeed be accessed via SPI although they run at a different voltage.

[@ingmarm8858]

Nice work, great video as usual, I'm inspired to go interface some slave devices on the bench.

[@weirdboyjim]

I see what you did there....

[@TrollingAround]

Thoroughly enjoyed this, thanks 🙂

[@weirdboyjim]

Glad you enjoyed it!

[@maffsie]

Being honest, I'd like to see a full implementation of SPI if just because I want to see the process of designing and implementing a peripheral like that.

[@weirdboyjim]

I'll definitely extend the circuit, not sure how far I'll go with it yet.

[@TheEmbeddedHobbyist]

Nice to check the OSF flag before a reading the time or date, so you have an indication whether you can trust the data. Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator has stopped or was stopped for some time and may be used to judge the validity of the clock and calendar data.

[@weirdboyjim]

Yeah but I wanted to keep this about SPI rather than the idiosyncrasies of that chip. After recording I switched it to a multi byte read which I believe is the other way to solve that issue. For anyone reading this comment, the issue TEH is referring to relates to when the time or date counters roll over between reads. So for example if I read the minutes then the seconds as the rollover is occurring from 2:59 I might read 2:00.

[@TheEmbeddedHobbyist]

Well not quite the OSF flag lets you know if the oscillator as stopped at some point in time before you have read the chip. if set the time can not be trusted as you have no idea how long the oscillator has stopped, I.E. your back-up battery might have dropped below the voltage level to support a stable clock. I check this when I power up the circuit and before I read the time, if set I go and attach to my wifi and get the correct time and date from a time serer and reprogram the RTC. @@weirdboyjim

[@FrankGevaerts]

I wish what you said about date order wasn't controversial... I fully agree, today is either 14/12/2023 or 2023-12-14 (I'm used to dashes for the "correct" order). Any other order is just weird and illogical! (the rest of the video is also interesting :) ) I think some simple hardware help would be interesting and useful. Having things go faster than pure software bitbanging should expand the possibilities a lot and change the way you use things. I think even for the RTC, I suspect if you wanted to show a timer on screen now (say a game level elapsed time thing) you'd use some sort of VGA frame counter or something like that and you wouldn't waste hundreds of cycles to read the RTC just for that, but if that gets reduced to say a dozen or two cycles the option will be there.

[@weirdboyjim]

Thanks! If your code is synced to vga frames then a frame counter is trivial but it can be nice to have a time source you don't need to monitor.

[@RoamingAdhocrat]

yyyy-mm-dd (with leading zeros) is the international standard, ISO8601. I always use either ISO8601 or if I'm localising for Britishers, I'll spell out the month, e.g. 07 Dec 2023, so there's no chance of confusion with 2023-07-12

[@AJB2K3]

Yeh, month, day ,year or year, day, month is just wrong

[@BillySugger1965]

IEC 8601 every day 😂

[@bzuidgeest]

Month first is something the Americans got from the British. And it certainly isn't the most used format. That is either day first or year first as in the iso standard. But you cannot blame the guy for being born British.

[@colinstu]

I'd like to see either implementation! start w/easy one first, and assess from there if full is needed still.

[@weirdboyjim]

Yeah, I think incremental building makes for a better learning experience!

[@hamdanmahmood346]

Awesome video - thank you!

[@weirdboyjim]

Thanks! Glad you found it interesting!

[@nahkamursu]

i love artificial limits like making sure chip count stays low :)

[@weirdboyjim]

So do I although once you factor cost or space into the equation those limits may not be artificial!

[@ViniciusMiguel1988]

You will also need to accommodate clock speed setup since different devices can operate in different clocks, probably a register/counter/comparator schema, I guess that is what going to consume more logic.

[@weirdboyjim]

Fortunately the need for variable clock speeds is limited, my "high speed" clock of 4mhz is pretty low in the grand scheme of modern electronics.

[@khatharrmalkavian3306]

SNEScon is just a pair of shift registers, and those do play nice with SPI. Enough so that a shift register and a few logic gates are all you need for an SPI bus controller.

[@weirdboyjim]

Similar yes, but the latch line doesn't work quite like the chip select line.

[@khatharrmalkavian3306]

For a 595 you can just put an inverter on cs and run it to the latch. The same line can disable all the devices attached to the bus, so cs on means write to the register, then cs off means that the target device(s) selected, based on whatever was written to the register.

[@frognik79]

The date is the 'correct' way around here in Australia. Why is it upside down though?

[@weirdboyjim]

It must be really difficult to read hour glasses down there!

[@Stabby666]

If you were willing to accept a small compromise of streaming in blocks of 256 bytes at a time, you could load data at 4mhz directly to RAM using a few chips: A shift-in parallel out connected to the SPI sub (I'll assume flash memory here) An 8 bit counter with bit 3 used to latch the data in the above register to its output, and reset this counter An 8 bit counter with its outputs on the low 8 bits of the data bus (of course you could use 2 of these, to allow loading up to 64k blocks) This would require some way to disconnect the CPU from the data and address bus during the transfer - the old ZX81 (I believe) used resistors so that the data bus could be overridden on the CPU side of the resistors to the NOP instruction whilst drawing the screen. So the set up would use a normal SPI write to set the read address from the SPI flash chip, then using one of the unused bits of the GPIO output to initiate the DMA transfer, with some sequence like: 1. Set a latch to force NOPs on the data bus of the CPU 2. Force the high 8 bits of the address bus to a fixed value 3. Reset the two counters. Then each clock would read a bit from the SPI flash into the shit-in register, and after 8 clocks the first counter would latch the output into RAM, and reset itself (which would also reset the latch) then via a slight delay circuit, increment the memory address counter register. This would continue until the overflow of the address counter register, which could signal the end of the transfer and release the forced NOP from the CPU, allowing it to continue. Of course you could reuse most of that to also stream data out if you wanted, but I guess that's not really needed so much for games! The bus arbitration would be a couple of parts, but I guess this all depends on if you want to load in 256 bytes in under 1/2 a millisecond :) Obviously this is at 4mhz - I cant remember if you use a clock divider on your main crystal, but obviously this could run as fast as the SPI flash/RAM can handle the transfers.

[@weirdboyjim]

I think you can get to the full 4mhz without anything as complex as you describe here. The challenge is to do it with as simple a system as possible working within the limitations of the underlying system.

[@Stabby666]

@@weirdboyjim yep it was a bit late when I typed that and later thought you only really need a shift in and shift out register with the main clock fed into both and cycle accurate code to handle latching and loading/storing the data at the full rate 😁

[@GorgotMM]

I would love to see a full SPI implementation, maybe interfacing more RAM, a flash device, things like that.

[@weirdboyjim]

I don't think this is the right way to go for ram, but it does give us some storage options!

[@colinstu]

17:37 ISO-8601 FTW!!!

[@weirdboyjim]

Definitely for date!

[@WayneMetcalf]

And where were you when I was fumbling around trying to learn SPI? 😅😂 Awesome vid as always. 😊

[@weirdboyjim]

Glad you found it interesting!

[@RooMan93]

As we're using console accessories, a PS1(2) Memory Card would be fun, it uses SPI with a couple of quirks.

[@bzuidgeest]

That's not a bad idea. Those are cheap as can be and you could basically treat them as a flash cartridge.

[@weirdboyjim]

Interesting idea, I like it but there doesn't seem to be an easy way of getting data on/off from a pc.

[@RooMan93]

@@weirdboyjim I hadn't thought that far ahead to be honest

[@RegisMichelLeclerc]

How much would it take to implement it fully in electronics instead of software? How much faster would it be? I know it's implemented in hardware in the ATMega8 (as well as I2C), which makes it piece of cake to interface small OLED screens (including color ones in 16 bits), and such thing is not really possible at 70K per second... Meanwhile (IIRC), an ATMega8 on an Arduino at 16MHz "limits" the bandwidth to 4MHz (f(osc)/4) as a slave, which would be more like 300KB/s (including protocol bits), which lets it do something else (such as reading the clock it displays, or reading the MPU6050 and calculate the display lines for a compass while sending orders to servo motors, read the position of the paddle to set the desired roll/yaw/pitch, etc.).

[@weirdboyjim]

My goal would be to use the system clock (4mhz), I think even a partial implementation could max out the data transfer rate to 4mbs.

[@cj09beira]

well as an example it took me 21 74 series chips to implement one which supports all permutations of SPI and bit order.

[@TLang-el6sk]

Personally I would go for a partial implementation. I'm doing professional development of embedded software for typical automotive and mainstream ARM controllers for nearly 30 Years now and the "full" implementations of many of these controllers are very limited, especially when it comes to word lengths and bitrate settings. So as soon as you have some hardware that e. g. requires 24bit or 32bit transfers (a collegue of mine currently is fighting with an ADC requiring these) you may have to turn of all the nice automatic features and fire the data by software. It's not bitbanging but still you will have a higher CPU load. And exactly this is the level I would implement: Clock out the data of let's say an 8 bit word automatically, perhaps add another byte as buffer and do the rest by code.

[@weirdboyjim]

Thanks for the input. There seems to be some very different ideas on what would constitute a full implementation but for me just something that can stream 8-bits in/out without manually toggling the clock line would tick a lot of boxes!

[@DavidLindes]

17:27 - I don't see how it's annoying to call out how ISO 8601 is a thing. ;)

[@weirdboyjim]

What people find annoying the internet will never fail to surprise you!

[@DavidLindes]

@@weirdboyjim Fair. I mean, I admit I found it mildly annoying that you basically gave a plug for 8601 but then didn't use it. ;) [But I don't actually care, it's your thing!]

[@segfault-berlin]

yes please do a full SPI circuit.

[@weirdboyjim]

Seems to be a lot of call for it!

[@DAVIDGREGORYKERR]

What about using the INTEL 8251 for SPI

[@weirdboyjim]

I wanted to do this "from scratch", I'll use more off the shelf parts in the future. That said, I don't think the 8251 can do SPI.

[@janschrder]

Full SPI or a hybrid optimised for speed? Hmmmm... If You're not going to use SPI for a lot of different purposes, the latter of Your suggestions might be the most interesting one. I guess that I'll be leaning towards that one too :-)

[@weirdboyjim]

Yeah, I've been roughing out some ideas. I think I can get pretty close to 4mb/s read speed with the addition of 2 chips.

[@janschrder]

@@weirdboyjim That would be an interesting achievement 😎👍

[@sanderspeetjens]

I would like to see a hardware implementation instead of bit banging. The reason is that I created a spi slave in VHDL but haven't seen a logic components version

[@weirdboyjim]

I'll definitely do some hardware work on it!

[@mekafinchi]

Funny to see your homebrew system with hardware UART and software SPI vs my homebrew system with hardware SPI and (potential) software UART

[@weirdboyjim]

Lol, people seem to be pushing me towards adding at least a partial implementation in hardware.

[@wadowicegwadowiceg8093]

To me, I'd love to see octalSPI or QuadSPI. Probably too much for 8-bit computers, but easy to do with bit-banging. Good job !

[@weirdboyjim]

I've thought those variants should be called PPI!

[@TheEmbeddedHobbyist]

How about putting the SPI hardware in to a PAL and do SPI to parallel transfers. kind of fitting with the era of the design.

[@weirdboyjim]

Still avoiding more complex programmable parts. Shouldn't be a complex circuit anyway!

[@TheEmbeddedHobbyist]

But PAL's and GAL's are on the low side of complex@@weirdboyjim

[@3osufdh4rfg]

SPI? Mentioning moving towards a storage solution? I'm guessing SD cards. Could be a flash chip with SPI too but that seems less useful.

[@weirdboyjim]

"You might very well think that; I couldn't possibly comment"

[@edgeeffect]

Yeah in the UK we do dates backwards which is better than some places, where they do them inside-out. ;)

[@weirdboyjim]

Sadly "Number of seconds since January 1, 1970" didn't catch on with the general public.

[@TheEmbeddedHobbyist]

This type of data transmission is so easy to bit bang, this goes of any form of well documented data transfer, I much prefer this than RS232. Reading RS232 where you can have no idea of how many characters are coming , whether they will end with CR/LF or LF/CR. even down to if the sending Baud rate is the same as your receiving rate even when they are set the same. Can't beat a nice preamble to lock your clocks. 🙂

[@weirdboyjim]

Why use one wire when you can use 3! 😅

[@TheEmbeddedHobbyist]

Well Rs232 is two wire but who's splitting hairs. 🙂@@weirdboyjim And of course SPI always +1 as you need a ground reference.

[@jensschroder8214]

Can't SD cards also be read via SPI? At least in MMC compatibility mode! It probably only takes a few shift registers to convert from SPI to 8 bits in parallel.

[@weirdboyjim]

It can indeed. The core of an spi circuit would be shift registers but the control circuitry adds a bit of complexity.

[@bzuidgeest]

So can PS1 memory cards. Their size fits the system better, but they are harder to read on desktop machines.

[@weirdboyjim]

@@bzuidgeest interesting….

[@hola3535]

Uff, this is a complex situation, for one part we want something simple, but for the other part we want something that fullfill all of owr spectations.

[@weirdboyjim]

That's always the problem!

[@kilianhekhuis]

What you should watch out for, is that interfacing with a full hardware implementation of SPI could end up being as much code as interfacing with a partial implementation.

[@weirdboyjim]

I agree, the definition of "full implementation" is also pretty vague. I'm interested in finding the sweet spot to get a decent transfer rate.

[@AJB2K3]

Does the cryatal not need capacitors?

[@weirdboyjim]

I was surprised by that but the datasheet doesn't have them and it seems to work fine without.

[@rickdearman9992]

Wow. I have researching SPI and bit banging. Coincidence

[@weirdboyjim]

Hope what I've done is useful!

[@peter.stimpel]

If I was you, I would not go for the last bit of every integration now, just what you need for the moment, with room for improvement. But that's me only.

[@weirdboyjim]

I do have a habit of going down rabbit holes, but we probably wouldn't be here if I didn't.

[@halfacanuck]

Never apologize for YY/MM/DD!

[@weirdboyjim]

Some people are very sensitive about this stuff!

[@halfacanuck]

@weirdboyjim Just wave ISO-8601 at them ;)

[@halfacanuck]

@@weirdboyjim Just wave ISO-8601 at them ;)

[@halfacanuck]

@@weirdboyjim Just wave the date-format ISO standard at them (which we're not allowed to name because it has a four-digit number in it, I guess?) ;)

[@TheChrisSimpson]

Do a full SPI!

[@weirdboyjim]

I'll think about it. 😅

[@gammongaming9081]

should add scsi to the computer for data storage

[@weirdboyjim]

An idea, but probably over the top for an 8-bit system with 64k of ram!

[@cj09beira]

with SPI in, ENC80J60 says hello

[@weirdboyjim]

Eack, would not relish driving that with 64k of ram!

[@bzuidgeest]

I was actually disappointed you used bit banging. So yes please build a full spi peripheral. It's true you could load your memory in a second with bit banging. But.... The full system will have many peripherals it needs to control, not just the load. You need to monitor the gamepad, make sound, write graphics. All that will take CPU cycles. So 70kb per second is rather optimistic in a real scenario. Also if you are going to talk to an SD card or something, there is far more protocol overhead. So the number of actually transferred bytes will increase. Like the VGA having spirits to offload drawing, you might want to give the full spi hardware a buffer, so if you're busy doing something else transfers keep going and you can catch up later.

[@weirdboyjim]

I always like to break things down into logical steps. Bit Banging was a good place to start, I'll definitely add some hardware support.

[@m1geo]

Hardware SPI!

[@weirdboyjim]

I've been playing with some ideas, I think it would be possible to get a hybrid circuit to roughly max out the system clockrate (4mb/s) with very few chips and clever code. What would you expect from full spi?

[@m1geo]

@@weirdboyjim Haha, I mean, at work, 250 MHz clock, and sequential read/write. But that's not realistic out of discrete parts. Maybe 40 MHz is a good target, but no sense running the SCLK faster than you fill/take data. Will you be using anything with lots of memory? SDCard? Or is this just for slow peripherals? Either way, couple of shift registers, a control register, and maybe a clock divider register should have you covered?

[@weirdboyjim]

@@m1geo It would take me a minimum of 3 cycles to consume a byte and store it in memory. So spi clocked at over 10 mhz wouldn't really be of any use. I'd settle for clocking the spi at the system clock at 4mhz.

[@m1geo]

@@weirdboyjim 4 MHz sounds a good speed. Should be easy to get the logic to do that. Will you have read/write FIFO?

[@weirdboyjim]

@@m1geo Haven't decided exactly what I'm doing but there is not a great deal of cost/benefit to a fifo here.

[@jensschroder8214]

In Europa the order is day/month/year. In China year/month/day. In the US the order makes no sense: month/day/year

[@weirdboyjim]

Since recording the code I've been noticing all the places that do year-month-day regardless, I'll probably switch my code to that.

[@luz_reyes_676]

It makes sense !! its how we speak the date. how do yall speak aloud the date in conversation ?

[@CollinBaillie]

​@@luz_reyes_676I came to make this comment. We pretty much say it as we write it also (day-month-year in Australia). We'll say the 25th of December, rather than December 25th.

[@martinmckee5333]

​@@luz_reyes_676In the US it is often spoken month-day-year, just as it's written here. Sometimes, more rarely someone will speak day-month or day-month-year. I don't think I've ever heard year-month-day spoken, though I have worked on some projects that have used it for file naming (primarily due to the sorting behavior).

[@johnaldis9832]

@@luz_reyes_676 I say "the of ". So US Independence Day is "the fourth of July" for example. What do you call it? 🙂

[@Xylarr]

"Other geographies do it differently". No, one geography does it wrong - let's not beat around the bush.

[@weirdboyjim]

You might think that, I couldn't possibly comment. 😜

[@tinygriffy]

I am using SPI for years now and never bothered to _really_ understand it.. very comprehensive, thanks .. (If I had to use your Keyboard on my PC it would drive me crazy in milliseconds.. 😅🙈)

[@weirdboyjim]

Hope it was useful! My keyboard isn't a noisy as you think it is in person but the impact noises couple easily with the mic, and I do have a tendency to punch the enter key when I'm doing a run command.

[@tinygriffy]

@@weirdboyjim Oh, I see.. sound coupling.. well never mind then ! Yes, I think all of your Videos are relatively useful.. and entertaining ;) It is astonishing what kind of progress is happening there, I am watching since the start of the project ;)

[@0toleranz]

@@weirdboyjimI second that keyboard noise because I often watch your videos commuting from/to work on the iPad with AirPods on and especially this time I had to turn down the volume because the key-clack was so loud I barely could hear what you were saying. Could you just turn down the ambient noise? By using a 2nd mic most modern software should be able to do so. BTW the 74LS299 is probably the easiest way to implement a bidirectional spi ish interface. Implementing the 4 different modes needs probably the most additional silicon.

[@akkudakkupl]

Master Out Slave In, Master In Slave Out. There is some stupid notion that people will be offended by mere existence of certain words, so we should change established nomenclature just to make those hypothetical individuals "safe". The problem is not in the nomenclature, but in the people who elect to get offended by anything and everything. I don't understand this trend at all.

[@porklaser]

These terms should be phased out because their origins unsavory and their continued use is both a distraction and poor taste. This argument has been settled decades ago. Catch up.

[@rickyrico80]

Lots of software got broken when github had the brilliant idea to switch the master branche to main branche. The only people affected we're obviously not the people that had issue with masters or slaves but hey, progress I guess words are scary things for feeble minds.

[@bzuidgeest]

​@@porklasertheir is nothing unsavory about the origins of the terms. They accurately describe the relation between two non sentient devices. It has nothing to do with slavery between humans. If you cannot separate your emotions from tech you have a problem. What's next, you going to fake your results to make them fit a religion? Or some other unprovable notion? Tech deals with facts, leave your politics at home.

[@cj09beira]

agreed, modern society really is in the "Weak men make hard times" part of the cycle

[@porklaser]

Techical debt punishes the lazy. Do you read your style guides?@@rickyrico80

[@bussi7859]

Too crappy keyboard

[@weirdboyjim]

I like my keyboard.

[@cjveeneman]

Wiki changing Master/Slave to Main/Sub is very much intentional.

[@weirdboyjim]

Yes, but if you try to cover up that it was ever referred to as Master/Slave you make nonsense out of a lot of old documentation.

[@AJB2K3]

The Master/Slave designations are being ruled out because of the Snowflake Generations!

[@weirdboyjim]

I'm just trying to keep everything factual.

[@tomasparrado873]

I don't care what they're called so long as it doesn't fall into the in/out or rx/tx trap. Main/sub works well and fits the classic miso/mosi acronym. Even host/client that i've seen in a few recent microchip datasheets is acceptable. I don't like the data in/data out convention whereby the nets swap name depending on which chip you're referencing. It's not a big issue, but the fewer silly ways to screw up a layout the better

[@luz_reyes_676]

i think its also that the field has matured and we can have more meaningful nomenclature

[@bzuidgeest]

​@@weirdboyjimyou shouldn't have had to deal with it at all. I compliment you on putting the facts out there as they are. But the necessity of your explanation is caused by politics seeping into tech and that's just as bad as religion messing with science.

[@bzuidgeest]

​​@@tomasparrado873slave in this context had more meaning than sub can convey. The slave device follows the master, the master generates the clock. Slave in this regard said something about how dependent the sub device is. Sub does not convey that meaning at all.

[@bussi7859]

Get a haircut

[@weirdboyjim]

I hope your strategy at social interaction works out for you.