Time Domain Intuitive Analysis of 2nd Order Circuits || Analog VLSI Mastery (Cohort 0-10)

Join Our Telegram Group - t.me/All_About_Learning
On our channel, you will get
1) Comprehensive Courses
2) Lecture Notes
3) Assignments
This course is helpful for Placements in Analog VLSI domain.
________________________________________________________________
#GATE, #GATE2022, #GATE2023, #GATE2024, #GATE2025, #TI, #IIT, #MOTIVATION, #BEGINNING, #CHANNEL, #ESE, #PREPARATION, #PLACEMENTS, #gatepreparation, #engineering, #ese, #gatecoaching, #gateexampreparation, #aptitude, #gatemocktest, #psus, #gatetestseries, #education, #ece, #ec, #ee, #electrical, #electricalengineering, #electronics, #instrumentationengineering, #instrumentation,#Analog,#NXP,#TI,#Intel,#Qualcomm,#AnalogDesign,#VLSI,#AnalogVLSI,#Placements,#Micron,#Intern,#Internship,#Unacademy,#Gate

[@AmitBar-Analog_Circuits]

One of the best video brother !

[@HardikJain_YT]

20:35 ir2 has to go down easily because ir2 charges vc2 and ir2 = c2dvc2/dt and over time dvc2/dt is decreasing so ir2 decreasing also ir2 is decreasing throughout since vc2 is rising throughout with decreasing slope

[@pranjalmahajan4437]

I am not finding the notes on telegram group. Can you attach the notes pdf here, I want to check answer of second question?

[@pranjalmahajan4437]

43:10 How IR2 > IR1 - IR2 always?

[@HardikJain_YT]

how can you guarantee that i1-i2 > i2 please reply thanks better maybe since vc2 is rising and its slope is decreasing so ir2 is decreasing same for ir1 since vc1 is rising (in last ques)