U5 L6.2 | TTL NAND Gate with Totem Pole Output | TTL totem pole explanation | 2 input TTL NAND Gate

[@adithyasreekumar4030]

Maam your explanation is very clear and straight. Thank you for teaching this topic 🥰.

[@prajvalgaikwad1576]

superb explanation mam....... we need teachers like u... thank u

[@TechnoTutorials2783]

Thanks 😊

[@samiulislam4069]

Nice video.... From Bangladesh

[@TechnoTutorials2783]

Thanks 😊

[@adinathshelke8622]

superbbb, was wandering through videos, didn't get the right tutorial. But this one was what I was looking for.

[@TechnoTutorials2783]

Thank you dear

[@anushkagupta7607]

Thank you ma'am... really fantastic explanation.. keep posting helpful content

[@TechnoTutorials2783]

Thanku dear for feedback

[@soumensarkar7459]

Mam, please mention the superiority of optical logic gates over electronic logic gates and opto-electric logic gates

[@apurvasali]

Superb Explanation 👌

[@TechnoTutorials2783]

Thanku so much Keep watching to support my videos

[@vivek_1300]

Wonderful explanation

[@TechnoTutorials2783]

Thank you

[@maidulalvi]

excellent lecture, but i have some confused , if we apply input section 5V (high volt) respectively A and B , Then what will be the result or how will be the logic output value?

[@TechnoTutorials2783]

Last case will be its explanation

[@kamyagupta4030]

thank you so much ma'am ❤️

[@TechnoTutorials2783]

😊

[@moviesmania253]

you have used Vbe = 0.7 v in TTL NOR GATE , Vbe = 0.6 in TTL NAND GATE. it's confusing . Which is right ????

[@TechnoTutorials2783]

At more than .7 saturation region So u can take either .6 or .7 Because for large base current voltage between base and emitter .6 to .7 required to conduct

[@moviesmania253]

@@TechnoTutorials2783 thanks a lot. you deserve more views & subscribers !!!!!

[@TechnoTutorials2783]

@@moviesmania253 thank you

[@shorts.219.]

Mam in ttl at logic level one ke graph me voutput starting me constant Hota Hai kucch point tak Aisa Kyo please reply

[@amansrivastava7513]

In all four combinations q1 is on . Right na

[@TechnoTutorials2783]

On off the pn junction is forward biased

[@adel_sensei_]

Thanks mam💜

[@geetamehara2798]

At 12.:31 How voltage .2 volt? Please explain.

[@sandeshthapa6419]

are ttl nand gate with totempole output and ttl not gate same maam??

[@TechnoTutorials2783]

No

[@harshitsinghbanaswara2003]

Mam please explain me At Q3 transistor pr humne 0.7v liya hai kayi bar 0.65v lete hai konsa kab Lena hai please explain??????

[@TechnoTutorials2783]

Dono le sakte hai Actually for active region. 6 required

[@harshitsinghbanaswara2003]

@@TechnoTutorials2783 thanks you mam 😊😊 Good morning 🌄 have a nice day 🌈

[@harshitsinghbanaswara2003]

@@TechnoTutorials2783 I'm your student mam ,and I'm your sucriber also aur me apke videos dekhna psnd krta hu because aap bhut asha padte hai 😊😃

[@TechnoTutorials2783]

@@harshitsinghbanaswara2003 thanku

[@abdullah_alloun]

What is the importance of d1 diode?

[@TechnoTutorials2783]

It is used between both transistor so that at a time only one will on and other will be off

[@shorts.219.]

Mam what is use of diode here

[@TechnoTutorials2783]

At a time either t3 will On or T4 By placing Diode between Transistor more voltage required to turn on upper Transistor

[@shorts.219.]

@@TechnoTutorials2783 Thank you so much mam

[@iamsoumya9907]

Exam day sae age is tarha ki justification boht achha lagta hae ❤️

[@akshorts351]

Mam please send the notes